On Tue, 2013-04-16 at 14:50 -0300, Paulo Zanoni wrote:
> 2013/4/16 Imre Deak :
> > On Tue, 2013-04-16 at 14:35 +0300, Ville Syrjälä wrote:
> >> On Tue, Apr 16, 2013 at 02:25:16PM +0300, Imre Deak wrote:
> >> > For the device to enter D3 we should enable PCH clock gating.
> >> >
> >> > Signed-off-by
2013/4/16 Imre Deak :
> On Tue, 2013-04-16 at 14:35 +0300, Ville Syrjälä wrote:
>> On Tue, Apr 16, 2013 at 02:25:16PM +0300, Imre Deak wrote:
>> > For the device to enter D3 we should enable PCH clock gating.
>> >
>> > Signed-off-by: Imre Deak
>> > ---
>> > drivers/gpu/drm/i915/i915_drv.c |
On Tue, 2013-04-16 at 14:35 +0300, Ville Syrjälä wrote:
> On Tue, Apr 16, 2013 at 02:25:16PM +0300, Imre Deak wrote:
> > For the device to enter D3 we should enable PCH clock gating.
> >
> > Signed-off-by: Imre Deak
> > ---
> > drivers/gpu/drm/i915/i915_drv.c |2 ++
> > drivers/gpu/drm/
On Tue, Apr 16, 2013 at 02:25:16PM +0300, Imre Deak wrote:
> For the device to enter D3 we should enable PCH clock gating.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/i915_drv.c |2 ++
> drivers/gpu/drm/i915/i915_drv.h |1 +
> drivers/gpu/drm/i915/intel_display.c
For the device to enter D3 we should enable PCH clock gating.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.c |2 ++
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/intel_display.c |5 +
drivers/gpu/drm/i915/intel_drv.h |1 +
drivers/gpu/