On Mon, Jul 28, 2014 at 07:56:27PM +0100, rafael.barba...@intel.com wrote:
> From: Rafael Barbalho
>
> According to the specifications bit 6 is actually valid in the stride
> register.
>
> Cc: Jesse Barnes
> Cc: Ville Syrjälä
> Signed-off-by: Rafael Barbalho
Indeed, min stride alignment is
From: Rafael Barbalho
According to the specifications bit 6 is actually valid in the stride register.
Cc: Jesse Barnes
Cc: Ville Syrjälä
Signed-off-by: Rafael Barbalho
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
