On Tue, Oct 30, 2012 at 07:16:34PM +0800, Zhenyu Wang wrote:
> Fix power well control state by reading real register offset.
>
> Signed-off-by: Zhenyu Wang
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffw
Fix power well control state by reading real register offset.
Signed-off-by: Zhenyu Wang
---
drivers/gpu/drm/i915/intel_pm.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 838d67d..3bcaad6 100644
---
