Re: [Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-08 Thread Jani Nikula
On Mon, 08 Sep 2014, Chris Wilson wrote: > Running igt, I was encountering the invalid TLB bug on my 845g, despite > that it was using the CS workaround. Examining the w/a buffer in the > error state, showed that the copy from the user batch into the > workaround itself was suffering from the inva

[Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-08 Thread Chris Wilson
Running igt, I was encountering the invalid TLB bug on my 845g, despite that it was using the CS workaround. Examining the w/a buffer in the error state, showed that the copy from the user batch into the workaround itself was suffering from the invalid TLB bug (the first cacheline was broken with t

Re: [Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-08 Thread Chris Wilson
On Mon, Sep 08, 2014 at 09:15:50AM +0100, Chris Wilson wrote: > On Mon, Sep 08, 2014 at 10:03:51AM +0200, Daniel Vetter wrote: > > On Sun, Sep 07, 2014 at 09:08:31AM +0100, Chris Wilson wrote: > > > Running igt, I was encountering the invalid TLB bug on my 845g, despite > > > that it was using the

Re: [Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-08 Thread Daniel Vetter
On Mon, Sep 08, 2014 at 09:15:50AM +0100, Chris Wilson wrote: > On Mon, Sep 08, 2014 at 10:03:51AM +0200, Daniel Vetter wrote: > > On Sun, Sep 07, 2014 at 09:08:31AM +0100, Chris Wilson wrote: > > > Running igt, I was encountering the invalid TLB bug on my 845g, despite > > > that it was using the

Re: [Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-08 Thread Chris Wilson
On Mon, Sep 08, 2014 at 10:03:51AM +0200, Daniel Vetter wrote: > On Sun, Sep 07, 2014 at 09:08:31AM +0100, Chris Wilson wrote: > > Running igt, I was encountering the invalid TLB bug on my 845g, despite > > that it was using the CS workaround. Examining the w/a buffer in the > > error state, showed

Re: [Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-08 Thread Daniel Vetter
On Sun, Sep 07, 2014 at 09:08:31AM +0100, Chris Wilson wrote: > Running igt, I was encountering the invalid TLB bug on my 845g, despite > that it was using the CS workaround. Examining the w/a buffer in the > error state, showed that the copy from the user batch into the > workaround itself was suf

Re: [Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-07 Thread Chris Wilson
On Sun, Sep 07, 2014 at 09:08:31AM +0100, Chris Wilson wrote: > Running igt, I was encountering the invalid TLB bug on my 845g, despite > that it was using the CS workaround. Examining the w/a buffer in the > error state, showed that the copy from the user batch into the > workaround itself was suf

[Intel-gfx] [PATCH] drm/i915: Evict CS TLBs between batches

2014-09-07 Thread Chris Wilson
Running igt, I was encountering the invalid TLB bug on my 845g, despite that it was using the CS workaround. Examining the w/a buffer in the error state, showed that the copy from the user batch into the workaround itself was suffering from the invalid TLB bug (the first cacheline was broken with t