n be disabled when enable VT switchless ?
>
> Thanks
>
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Friday, July 12, 2013 1:32 AM
> To: Jesse Barnes
> Cc: Zhang, Xiong Y; intel-gfx
> Subje
Thanks
-Original Message-
From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
Daniel Vetter
Sent: Friday, July 12, 2013 1:32 AM
To: Jesse Barnes
Cc: Zhang, Xiong Y; intel-gfx
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Decrease pll->refcount when freeze
gpu
On Th
On Thu, Jul 11, 2013 at 6:53 PM, Jesse Barnes wrote:
> On Thu, 11 Jul 2013 16:02:27 +0800
> Xiong Zhang wrote:
>
>> display.crtc_mode_set will increase pll->refcount, but no one will
>> decrease pll->refcount when freeze gpu. So when gpu resume from freeze,
>> pll->refcount is still larger than z
On Thu, 11 Jul 2013 16:02:27 +0800
Xiong Zhang wrote:
> display.crtc_mode_set will increase pll->refcount, but no one will
> decrease pll->refcount when freeze gpu. So when gpu resume from freeze,
> pll->refcount is still larger than zero. This is abnormal
>
> Without this patch, connecting vga
display.crtc_mode_set will increase pll->refcount, but no one will
decrease pll->refcount when freeze gpu. So when gpu resume from freeze,
pll->refcount is still larger than zero. This is abnormal
Without this patch, connecting vga screen on Haswell platform, there
are following results:
1. when r
