Re: [Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-10 Thread Daniel Vetter
On Fri, May 10, 2013 at 02:01:51PM +0100, Damien Lespiau wrote: > Up to now, we were using a static table to match the clock frequency > with a (r2,n2,p) triplet. Despite this table being big, it's by no mean > comprehensive and we had to fall back to the closest frequency when the > requested TMDS

[Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-10 Thread Damien Lespiau
Up to now, we were using a static table to match the clock frequency with a (r2,n2,p) triplet. Despite this table being big, it's by no mean comprehensive and we had to fall back to the closest frequency when the requested TMDS clock wasn't in the table. This patch computes (r2,n2,p) dynamically a

Re: [Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-10 Thread Damien Lespiau
On Wed, May 08, 2013 at 09:37:14PM +0200, Daniel Vetter wrote: > Oops, blows up on 32bit machines. I guess the igt will be useful once more > to check that the 32bit version is solid, too. Dropped from dinq for now. > -Daniel Oops indeed. Turns out the mistake was an easy one to spot. I used 1e6

Re: [Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-08 Thread Daniel Vetter
On Wed, May 08, 2013 at 09:13:54PM +0200, Daniel Vetter wrote: > On Wed, May 08, 2013 at 01:07:23PM -0300, Paulo Zanoni wrote: > > Hi > > > > 2013/5/8 Damien Lespiau : > > > Up to now, we were using a static table to match the clock frequency > > > with a (r2,n2,p) triplet. Despite this table bein

Re: [Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-08 Thread Daniel Vetter
On Wed, May 08, 2013 at 01:07:23PM -0300, Paulo Zanoni wrote: > Hi > > 2013/5/8 Damien Lespiau : > > Up to now, we were using a static table to match the clock frequency > > with a (r2,n2,p) triplet. Despite this table being big, it's by no mean > > comprehensive and we had to fall back to the clo

Re: [Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-08 Thread Damien Lespiau
On Wed, May 08, 2013 at 01:07:23PM -0300, Paulo Zanoni wrote: > I also looked briefly to your i-g-t patches. They look fine, but my > concern is that the code inside the Kernel will get out-of-sync with > the code in i-g-t, so we won't really be able to catch regressions. > OTOH, I do have an idea

Re: [Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-08 Thread Paulo Zanoni
Hi 2013/5/8 Damien Lespiau : > Up to now, we were using a static table to match the clock frequency > with a (r2,n2,p) triplet. Despite this table being big, it's by no mean > comprehensive and we had to fall back to the closest frequency when the > requested TMDS clock wasn't in the table. > > Th

[Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically

2013-05-08 Thread Damien Lespiau
Up to now, we were using a static table to match the clock frequency with a (r2,n2,p) triplet. Despite this table being big, it's by no mean comprehensive and we had to fall back to the closest frequency when the requested TMDS clock wasn't in the table. This patch computes (r2,n2,p) dynamically a