Re: [Intel-gfx] [PATCH] drm/i915: Bail out of pipe config compute loop on LPT

On Tue, May 03, 2016 at 11:29:21AM +0200, Maarten Lankhorst wrote: > Op 03-05-16 om 10:33 schreef Daniel Vetter: > > LPT is pch, so might run into the fdi bandwidth constraint (especially > > since it has only 2 lanes). But right now we just force pipe_bpp back > > to 24, resulting in a nice loop (

Re: [Intel-gfx] [PATCH] drm/i915: Bail out of pipe config compute loop on LPT

Op 03-05-16 om 10:33 schreef Daniel Vetter: > LPT is pch, so might run into the fdi bandwidth constraint (especially > since it has only 2 lanes). But right now we just force pipe_bpp back > to 24, resulting in a nice loop (which we bail out with a loud > WARN_ON). Fix this. > > Cc: Chris Wilson >

Re: [Intel-gfx] [PATCH] drm/i915: Bail out of pipe config compute loop on LPT

On Tue, May 03, 2016 at 10:33:01AM +0200, Daniel Vetter wrote: > LPT is pch, so might run into the fdi bandwidth constraint (especially > since it has only 2 lanes). But right now we just force pipe_bpp back > to 24, resulting in a nice loop (which we bail out with a loud > WARN_ON). Fix this. > >

[Intel-gfx] [PATCH] drm/i915: Bail out of pipe config compute loop on LPT

LPT is pch, so might run into the fdi bandwidth constraint (especially since it has only 2 lanes). But right now we just force pipe_bpp back to 24, resulting in a nice loop (which we bail out with a loud WARN_ON). Fix this. Cc: Chris Wilson Cc: Maarten Lankhorst References: https://bugs.freedesk