> -Original Message-
> From: Dixit, Ashutosh
> Sent: Thursday, April 7, 2022 12:49 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Gupta, Anshuman
> Subject: [PATCH] drm/i915/rps: Centralize computation of freq caps
>
> Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. Ho
On Wed, 06 Apr 2022 03:09:45 -0700, Anshuman Gupta wrote:
> On 2022-03-24 at 01:24:35 +0530, Ashutosh Dixit wrote:
> > +/* "Caps" frequencies should be converted to MHz using intel_gpu_freq() */
> IMHO, if this exported function deserves a comment, it should Kernel Doc
> comment.
> for an example
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
plac
On 2022-03-24 at 01:24:35 +0530, Ashutosh Dixit wrote:
> Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
> formats (bit positions, widths, registers and units) of these vary for
> different generations with even more variations arriving in the future. In
> order not to h
On 24-03-2022 01:24, Ashutosh Dixit wrote:
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do ident
On Wed, 23 Mar 2022 00:03:23 -0700, Nilawar, Badal wrote:
>
> > +/* "Caps" frequencies should be converted to MHz using intel_gpu_freq() */
> > +void intel_rps_get_freq_caps(struct intel_rps *rps, struct
> > intel_rps_freq_caps *capSis)
>
> Since this function is covering gen6 and above it would b
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
plac
On 23-03-2022 00:26, Ashutosh Dixit wrote:
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do ident
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
plac
On Mon, 21 Mar 2022 11:17:46 -0700, Lucas De Marchi wrote:
>
> On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > b/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > index 3941d8551f52..5990df35b393 100644
> > --- a/drivers/gp
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
plac
On Mon, 21 Mar 2022 11:17:46 -0700, Lucas De Marchi wrote:
>
> On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > b/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > index 3941d8551f52..5990df35b393 100644
> > --- a/drivers/gp
On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
b/drivers/gpu/drm/i915/gt/intel_rps_types.h
index 3941d8551f52..5990df35b393 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps_types
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
plac
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