We currenty check for platform at multiple parts in the driver
to grab the correct PLL. Let us begin to centralize it through a
helper function.
v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
v3: Clean up combo_pll_disable() (Rodrigo)
v4: s/dev_priv/i915 (Jani)
Move static
We currenty check for platform at multiple parts in the driver
to grab the correct PLL. Let us begin to centralize it through a
helper function.
v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
v3: Clean up combo_pll_disable() (Rodrigo)
v4: s/dev_priv/i915 (Jani)
Move static
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, September 10, 2020 6:31 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register
> lookup
>
> On Tue, 08 Sep 2
On Tue, 08 Sep 2020, Anusha Srivatsa wrote:
> We currenty check for platform at multiple parts in the driver
> to grab the correct PLL. Let us begin to centralize it through a
> helper function.
>
> v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
>
> v3: Clean up combo_pll_di
> On Sep 8, 2020, at 4:39 PM, Srivatsa, Anusha
> wrote:
>
> We currenty check for platform at multiple parts in the driver
> to grab the correct PLL. Let us begin to centralize it through a
> helper function.
>
> v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
>
> v3: C
We currenty check for platform at multiple parts in the driver
to grab the correct PLL. Let us begin to centralize it through a
helper function.
v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
v3: Clean up combo_pll_disable() (Rodrigo)
Suggested-by: Matt Roper
Cc: Ville Sy
Rodrigo Vivi
>>>> Sent: Tuesday, September 1, 2020 12:30 PM
>>>> To: Srivatsa, Anusha
>>>> Cc: intel-gfx@lists.freedesktop.org
>>>> Subject: Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE
>>>> register lookup
>>>&g
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Wednesday, September 2, 2020 2:32 PM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register
> lookup
>
>
>
&
> On Sep 2, 2020, at 12:30 PM, Srivatsa, Anusha
> wrote:
>
>
>
>> -Original Message-
>> From: Rodrigo Vivi
>> Sent: Tuesday, September 1, 2020 12:30 PM
>> To: Srivatsa, Anusha
>> Cc: intel-gfx@lists.freedesktop.org
>> Subjec
> -Original Message-
> From: Rodrigo Vivi
> Sent: Tuesday, September 1, 2020 12:30 PM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register
> lookup
>
> On Tue, Sep 0
On Tue, Sep 01, 2020 at 11:27:58AM -0700, Anusha Srivatsa wrote:
> We currenty check for platform at multiple parts in the driver
> to grab the correct PLL. Let us begin to centralize it through a
> helper function.
>
> v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
>
> Sug
We currenty check for platform at multiple parts in the driver
to grab the correct PLL. Let us begin to centralize it through a
helper function.
v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
Suggested-by: Matt Roper
Cc: Ville Syrjälä
Cc: Matt Roper
Signed-off-by: Anusha
On Mon, Aug 31, 2020 at 07:03:47PM +, Srivatsa, Anusha wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Monday, August 31, 2020 6:42 AM
> > To: Srivatsa, Anusha
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [I
> -Original Message-
> From: Ville Syrjälä
> Sent: Monday, August 31, 2020 6:42 AM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register
> lookup
>
> On Fri, Aug 2
On Fri, Aug 28, 2020 at 02:58:32PM -0700, Anusha Srivatsa wrote:
> We currenty check for platform at multiple parts in the driver
> to grab the correct PLL. Let us begin to centralize it through a
> helper function.
>
> Suggested-by: Matt Roper
> Cc: Matt Roper
> Signed-off-by: Anusha Srivatsa
We currenty check for platform at multiple parts in the driver
to grab the correct PLL. Let us begin to centralize it through a
helper function.
Suggested-by: Matt Roper
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 27 ---
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