On Thu, Feb 21, 2019 at 12:35:19AM +0530, Uma Shankar wrote:
> gamma mode mask was not considering the 30th and 31st bits.
> Due to this state readout was masking these bits, causing a
> mismatch and false warning, even though the registers were
> updated correctly. Dropped the gamma mode mask as i
gamma mode mask was not considering the 30th and 31st bits.
Due to this state readout was masking these bits, causing a
mismatch and false warning, even though the registers were
updated correctly. Dropped the gamma mode mask as it is
redundant and ideally entire register content should be
matching
