Quoting Zhenyu Wang (2018-10-31 05:17:48)
> On 2018.10.30 15:08:01 +0800, intel-gfx-boun...@lists.freedesktop.org wrote:
> > From: Hang Yuan
> >
> > This reverts commit c9e666880de5a1fed04dc412b046916d542b72dd.
> >
> > Checked GVT codes that guest PPGTT PTE flag bits are propagated
> > to shadow
On 2018.10.30 15:08:01 +0800, intel-gfx-boun...@lists.freedesktop.org wrote:
> From: Hang Yuan
>
> This reverts commit c9e666880de5a1fed04dc412b046916d542b72dd.
>
> Checked GVT codes that guest PPGTT PTE flag bits are propagated
> to shadow PTE. Read/write bit is not changed. Further tested by
>
Quoting hang.y...@linux.intel.com (2018-10-30 07:08:01)
> From: Hang Yuan
>
> This reverts commit c9e666880de5a1fed04dc412b046916d542b72dd.
>
> Checked GVT codes that guest PPGTT PTE flag bits are propagated
> to shadow PTE. Read/write bit is not changed. Further tested by
> i915 self-test case
From: Hang Yuan
This reverts commit c9e666880de5a1fed04dc412b046916d542b72dd.
Checked GVT codes that guest PPGTT PTE flag bits are propagated
to shadow PTE. Read/write bit is not changed. Further tested by
i915 self-test case "igt_ctx_readonly". No error or GPU hang was
detected. So enable read-