Re: [Intel-gfx] [PATCH] drm/i915/edp: use lane count and link rate from DPCD for eDP

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 11:25:13AM +0300, Jani Nikula wrote: > eDP panels are generally designed to support only a single clock and > lane configuration. > > commit 56071a207602a451f0c46d3dcc8379b59ef576e2 > Author: Jani Nikula > Date: Tue May 6 14:56:52 2014 +0300 > > drm/i915: use lane c

[Intel-gfx] [PATCH] drm/i915/edp: use lane count and link rate from DPCD for eDP

2014-09-09 Thread Jani Nikula
eDP panels are generally designed to support only a single clock and lane configuration. commit 56071a207602a451f0c46d3dcc8379b59ef576e2 Author: Jani Nikula Date: Tue May 6 14:56:52 2014 +0300 drm/i915: use lane count and link rate from VBT as minimums for eDP should have started using th