Re: [Intel-gfx] [PATCH] drm/i915/dg2: Implement WM0 cursor WA for DG2

2021-11-24 Thread Jani Nikula
On Wed, 24 Nov 2021, "Lisovskiy, Stanislav" wrote: > On Wed, Nov 24, 2021 at 12:23:08PM +0200, Jani Nikula wrote: >> On Thu, 18 Nov 2021, Stanislav Lisovskiy >> wrote: >> > +static bool icl_need_wm1_wa(struct drm_i915_private *i915, >> > + enum plane_id plane_id) >> >> Com

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Implement WM0 cursor WA for DG2

2021-11-24 Thread Lisovskiy, Stanislav
On Wed, Nov 24, 2021 at 12:23:08PM +0200, Jani Nikula wrote: > On Thu, 18 Nov 2021, Stanislav Lisovskiy > wrote: > > Bug in the register unit which results in WM1 register > > used when only WM0 is enabled on cursor. > > Software workaround is when only WM0 enabled on cursor, > > copy contents of

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Implement WM0 cursor WA for DG2

2021-11-24 Thread Jani Nikula
On Thu, 18 Nov 2021, Stanislav Lisovskiy wrote: > Bug in the register unit which results in WM1 register > used when only WM0 is enabled on cursor. > Software workaround is when only WM0 enabled on cursor, > copy contents of CUR_WM_0[30:0] (exclude the enable bit) > into CUR_WM_1[30:0]. > > v2: -

[Intel-gfx] [PATCH] drm/i915/dg2: Implement WM0 cursor WA for DG2

2021-11-18 Thread Stanislav Lisovskiy
Bug in the register unit which results in WM1 register used when only WM0 is enabled on cursor. Software workaround is when only WM0 enabled on cursor, copy contents of CUR_WM_0[30:0] (exclude the enable bit) into CUR_WM_1[30:0]. v2: - s/dev_priv/i915/ (Ville Syrjälä) - Removed unneeded brac

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Implement WM0 cursor WA for DG2

2021-11-17 Thread Ville Syrjälä
On Wed, Nov 17, 2021 at 03:43:41PM +0200, Stanislav Lisovskiy wrote: > Bug in the register unit which results in WM1 register > used when only WM0 is enabled on cursor. > Software workaround is when only WM0 enabled on cursor, > copy contents of CUR_WM_0[30:0] (exclude the enable bit) > into CUR_WM

[Intel-gfx] [PATCH] drm/i915/dg2: Implement WM0 cursor WA for DG2

2021-11-17 Thread Stanislav Lisovskiy
Bug in the register unit which results in WM1 register used when only WM0 is enabled on cursor. Software workaround is when only WM0 enabled on cursor, copy contents of CUR_WM_0[30:0] (exclude the enable bit) into CUR_WM_1[30:0]. HSDES: 14012656716 Signed-off-by: Stanislav Lisovskiy --- drivers