> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, February 10, 2022 10:51 AM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Update DMC_DEBUG3 register
>
> On Thu, Feb 10, 2022 at
On Thu, Feb 10, 2022 at 08:44:30AM -0800, Anusha Srivatsa wrote:
> DMC_DEBUGU3 changes from DG1+
This looks to be the same thing as the patch that Chuansheng Liu sent:
https://patchwork.freedesktop.org/patch/473272/?series=99942&rev=1
Matt
>
> Bspec: 49788
> Signed-off-by: Anusha Srivatsa
>
On 10/02/2022 16:44, Anusha Srivatsa wrote:
DMC_DEBUGU3 changes from DG1+
Bspec: 49788
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 --
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 5 insertions(+), 2 deleti
DMC_DEBUGU3 changes from DG1+
Bspec: 49788
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 --
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i
On Thu, 10 Feb 2022, Chuansheng Liu wrote:
> Current DMC_DEBUG3(_MMIO(0x101090)) address is for TGL,
> it is not wrong for DG1. Just like commit 5bcc95ca382e
wrong, not "not wrong".
BR,
Jani.
> ("drm/i915/dg1: Update DMC_DEBUG register"), correct
> this issue for DG1 platform to avoid wrong reg
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, February 10, 2022 1:28 PM
> To: Liu, Chuansheng
> Cc: intel-gfx@lists.freedesktop.org; Gupta, Anshuman
> ; De Marchi, Lucas
>
> Subject: Re: [PATCH] drm/i915/dg1: Update DMC_DEBUG3 register
>
> On Thu, Feb 10, 2022 at 01
On Thu, Feb 10, 2022 at 01:05:01PM +0800, Chuansheng Liu wrote:
> Current DMC_DEBUG3(_MMIO(0x101090)) address is for TGL,
> it is not wrong for DG1. Just like commit 5bcc95ca382e
> ("drm/i915/dg1: Update DMC_DEBUG register"), correct
> this issue for DG1 platform to avoid wrong register
> being rea
Current DMC_DEBUG3(_MMIO(0x101090)) address is for TGL,
it is not wrong for DG1. Just like commit 5bcc95ca382e
("drm/i915/dg1: Update DMC_DEBUG register"), correct
this issue for DG1 platform to avoid wrong register
being read.
BSpec: 49788
Signed-off-by: Chuansheng Liu
---
drivers/gpu/drm/i915
