> -Original Message-
> From: Sousa, Gustavo
> Sent: Wednesday, August 30, 2023 3:19 PM
> To: Kahola, Mika ; Sripada, Radhakrishna
> ; intel-
> g...@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/cx0: Check and increase msgbus
> timeout thresh
, Gustavo ;
>>> intel-gfx@lists.freedesktop.org
>>> Subject: Re: [Intel-gfx] [PATCH] drm/i915/cx0: Check and increase msgbus
>>> timeout threshold
>>>
>>> Hi Gustavo,
>>>
>>> > -Original Message-
>&g
Quoting Jani Nikula (2023-08-29 12:12:19-03:00)
>On Mon, 28 Aug 2023, Gustavo Sousa wrote:
+#define INTEL_CX0_MSGBUS_TIMER_VAL_MAX0x200
>
>Either make this 0x200U (for unsigned)...
>
+
bool intel_is_c10phy(struct drm_i915_private *i915, enum phy phy)
{
i
On Mon, 28 Aug 2023, Gustavo Sousa wrote:
>>> +#define INTEL_CX0_MSGBUS_TIMER_VAL_MAX0x200
Either make this 0x200U (for unsigned)...
>>> +
>>> bool intel_is_c10phy(struct drm_i915_private *i915, enum phy phy)
>>> {
>>> if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0) && phy < PHY_C
gfx] [PATCH] drm/i915/cx0: Check and increase msgbus
>> timeout threshold
>>
>> Hi Gustavo,
>>
>> > -Original Message-
>> > From: Sousa, Gustavo
>> > Sent: Monday, August 28, 2023 2:46 PM
>> > To: Sripada, Radhakrishna ; inte
> -Original Message-
> From: Intel-gfx On Behalf Of
> Sripada, Radhakrishna
> Sent: Tuesday, August 29, 2023 1:54 AM
> To: Sousa, Gustavo ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/cx0: Check and increase msgbus
> timeout thre
Hi Gustavo,
> -Original Message-
> From: Sousa, Gustavo
> Sent: Monday, August 28, 2023 2:46 PM
> To: Sripada, Radhakrishna ; intel-
> g...@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/cx0: Check and increase msgbus
> timeout threshold
t 28, 2023 10:34 AM
>> To: intel-gfx@lists.freedesktop.org
>> Subject: [Intel-gfx] [PATCH] drm/i915/cx0: Check and increase msgbus timeout
>> threshold
>>
>> We have experienced timeout issues when accessing C20 SRAM registers.
>This wording is misleading. It seems to imply that w
Hi Gustavo,
> -Original Message-
> From: Intel-gfx On Behalf Of Gustavo
> Sousa
> Sent: Monday, August 28, 2023 10:34 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH] drm/i915/cx0: Check and increase msgbus timeout
> threshold
>
>
We have experienced timeout issues when accessing C20 SRAM registers.
Experimentation showed that bumping the message bus timer threshold
helped on getting display Type-C connection on the C20 PHY to work.
While the timeout is still under investigation with the HW team, having
logic to allow forwa
10 matches
Mail list logo
