On Thu, 11 Jun 2015, Damien Lespiau wrote:
> On Wed, Jun 10, 2015 at 09:18:29AM -0700, Matt Roper wrote:
>> On Thu, Jun 04, 2015 at 06:01:35PM +0300, Imre Deak wrote:
>> > According to bspec the DDI PHY vswing scale value is "don't care" in
>> > case the scale enable bit [27] is clear. But this do
On Wed, Jun 10, 2015 at 09:18:29AM -0700, Matt Roper wrote:
> On Thu, Jun 04, 2015 at 06:01:35PM +0300, Imre Deak wrote:
> > According to bspec the DDI PHY vswing scale value is "don't care" in
> > case the scale enable bit [27] is clear. But this doesn't seem to be
> > correct. The scale value see
On Thu, Jun 04, 2015 at 06:01:35PM +0300, Imre Deak wrote:
> According to bspec the DDI PHY vswing scale value is "don't care" in
> case the scale enable bit [27] is clear. But this doesn't seem to be
> correct. The scale value seems to also matter if the scale mode bit
> [26] is set. So both bit 2
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6535
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
According to bspec the DDI PHY vswing scale value is "don't care" in
case the scale enable bit [27] is clear. But this doesn't seem to be
correct. The scale value seems to also matter if the scale mode bit
[26] is set. So both bit 26 and 27 depend on the value. Setting the
scale value to 0 while ei
