Re: [Intel-gfx] [GLK MIPI DSI V4 1/8] drm/i915/glk: Program dphy param reg for GLK

2017-02-08 Thread Chauhan, Madhav
> -Original Message- > From: Nikula, Jani > Sent: Wednesday, February 8, 2017 8:24 PM > To: Chauhan, Madhav ; intel- > g...@lists.freedesktop.org > Cc: Shankar, Uma ; Mukherjee, Indranil > ; Kamath, Sunil ; > Saarinen, Jani ; Conselvan De Oliveira, Ander > ; Deepak M > ; Chauhan, Madhav >

Re: [Intel-gfx] [GLK MIPI DSI V4 1/8] drm/i915/glk: Program dphy param reg for GLK

2017-02-08 Thread Jani Nikula
On Tue, 07 Feb 2017, Madhav Chauhan wrote: > From: Deepak M > > For GEMINILAKE, dphy param reg values are programmed in terms > of HS byte clock count while for older platforms in terms of > HS ddr clk count. > > v2: Added comments to clarify ddr clock count calculation > > Signed-off-by: Deepak

[Intel-gfx] [GLK MIPI DSI V4 1/8] drm/i915/glk: Program dphy param reg for GLK

2017-02-07 Thread Madhav Chauhan
From: Deepak M For GEMINILAKE, dphy param reg values are programmed in terms of HS byte clock count while for older platforms in terms of HS ddr clk count. v2: Added comments to clarify ddr clock count calculation Signed-off-by: Deepak M Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915