[Intel-gfx] [CI 4/4] drm/i915: Skip clearing the GGTT on full-ppgtt systems

2016-05-13 Thread Chris Wilson
Under full-ppgtt, access to the global GTT is carefully regulated through hardware functions (i.e. userspace cannot read and write to arbitrary locations in the GGTT via the GPU). With this restriction in place, we can forgo clearing stale entries from the GGTT as they will not be accessed. For al

[Intel-gfx] [CI 4/4] drm/i915: Skip clearing the GGTT on full-ppgtt systems

2016-05-13 Thread Chris Wilson
Under full-ppgtt, access to the global GTT is carefully regulated through hardware functions (i.e. userspace cannot read and write to arbitrary locations in the GGTT via the GPU). With this restriction in place, we can forgo clearing stale entries from the GGTT as they will not be accessed. For al

[Intel-gfx] [CI 4/4] drm/i915: Skip clearing the GGTT on full-ppgtt systems

2016-05-13 Thread Chris Wilson
Under full-ppgtt, access to the global GTT is carefully regulated through hardware functions (i.e. userspace cannot read and write to arbitrary locations in the GGTT via the GPU). With this restriction in place, we can forgo clearing stale entries from the GGTT as they will not be accessed. For al