Robert Navarro gmail.com> writes:
>
> Finally got around to compiling this for my system, there were a few issues
> with the build scripts on the latest Ubuntu.
>
> Currently running 3.15.0-rc3-custom-drm-intel-nightly-bug70254+ with no
> issues thus far.
>
> I'll give a few more days just to
On Thu, 15 May 2014, Ville Syrjälä wrote:
> On Thu, May 15, 2014 at 01:34:44PM +0300, Jani Nikula wrote:
>> On Thu, 15 May 2014, Chris Wilson wrote:
>> > On Thu, May 15, 2014 at 01:13:21PM +0300, Jani Nikula wrote:
>> >> On Thu, 08 May 2014, ville.syrj...@linux.intel.com wrote:
>> >> > From: Vill
On Thu, May 15, 2014 at 01:34:44PM +0300, Jani Nikula wrote:
> On Thu, 15 May 2014, Chris Wilson wrote:
> > On Thu, May 15, 2014 at 01:13:21PM +0300, Jani Nikula wrote:
> >> On Thu, 08 May 2014, ville.syrj...@linux.intel.com wrote:
> >> > From: Ville Syrjälä
> >> > +static void snb_wm_latency_qui
On Thu, 15 May 2014, Chris Wilson wrote:
> On Thu, May 15, 2014 at 01:13:21PM +0300, Jani Nikula wrote:
>> On Thu, 08 May 2014, ville.syrj...@linux.intel.com wrote:
>> > From: Ville Syrjälä
>> > +static void snb_wm_latency_quirk(struct drm_device *dev)
>> > +{
>> > + struct drm_i915_private *dev
On Thu, May 15, 2014 at 01:13:21PM +0300, Jani Nikula wrote:
> On Thu, 08 May 2014, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> > +static void snb_wm_latency_quirk(struct drm_device *dev)
> > +{
> > + struct drm_i915_private *dev_priv = dev->dev_private;
> > + bool changed;
On Thu, 08 May 2014, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On SNB the BIOS provided WM memory latency values seem insufficient to
> handle high resolution displays.
>
> In this particular case the display mode was a 2560x1440@60Hz, which
> makes the pixel clock 241.5 MHz.
Ville Syrjälä linux.intel.com> writes:
>
> Replace.
>
Finally got around to compiling this for my system, there were a few issues
with the build scripts on the latest Ubuntu.
Currently running 3.15.0-rc3-custom-drm-intel-nightly-bug70254+ with no
issues thus far.
I'll give a few more days
On Fri, May 09, 2014 at 05:46:43PM +, Robert Navarro wrote:
> Ville Syrjälä linux.intel.com> writes:
>
> > I think it should apply to 3.13+. If not directly then with a bit of
> > manual frobbery. Which reminds me that we should perhaps slap a cc
> > stable on it to get it included in 3.13+.
Ville Syrjälä linux.intel.com> writes:
> I think it should apply to 3.13+. If not directly then with a bit of
> manual frobbery. Which reminds me that we should perhaps slap a cc
> stable on it to get it included in 3.13+. For older kernels the patch
> would have to look totally different, so I'm
On Fri, May 09, 2014 at 03:23:41PM +, Robert Navarro wrote:
> Thanks for this Ville.
>
> Should this apply to 3.14 and 3.15?
>
> I'll try it on 3.15 first and report back.
I think it should apply to 3.13+. If not directly then with a bit of
manual frobbery. Which reminds me that we should pe
Thanks for this Ville.
Should this apply to 3.14 and 3.15?
I'll try it on 3.15 first and report back.
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From: Ville Syrjälä
On SNB the BIOS provided WM memory latency values seem insufficient to
handle high resolution displays.
In this particular case the display mode was a 2560x1440@60Hz, which
makes the pixel clock 241.5 MHz. It was empirically found that a memory
latency value if 1.2 usec is en
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