Re: [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON

On 02/12/20 2:17 am, Shankar, Uma wrote: > >> -Original Message- >> From: Intel-gfx On Behalf Of >> Shashank >> Sharma >> Sent: Monday, November 30, 2020 4:43 PM >> To: intel-gfx@lists.freedesktop.org >> Subject: Re: [Intel-gfx] [v12 15

Re: [Intel-gfx] [v12 15/15] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON

Hello Uma, This expectations from user-space of having to adjust the timings of video mode doesn't seem like a good idea to me. This seems more like a quirk, and it should be better kept in I915 layer itself. Else, it will enforce user space to write a lot of vendor specific code, like: - Is

[Intel-gfx] [PATCH 3/3] drm/i915: Handle nearest-neighbor scaling filter

ntainers can suggest. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 102 ++ .../drm/i915/display/intel_display_types.h| 3 + drivers/gpu/drm/i915/i915_reg.h | 31 ++ 3 files changed, 136 insertions(+) diff --git a/drivers/

[Intel-gfx] [PATCH 2/3] drm/i915: Add support for scaling filters

This patch does the following: - Creates the CRTC property for scaling filter mode (for GEN11 and +). - Applies the chosen filter value while enabling the panel fitter. - Adds CRTC state readouts and comparisons. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c

[Intel-gfx] [PATCH 1/3] drm: Introduce scaling filter mode property

pick filters like Nearest-neighbor applied for non-blurry outputs. There was a RFC patch series published, to discus the request to enable Integer mode scaling by some of the gaming communities, which can be found here: https://patchwork.freedesktop.org/series/66175/ Signed-off-by: Shashank S

[Intel-gfx] [PATCH 0/3] Add scaling filters in DRM layer

published for the same, which can be seen here: https://patchwork.freedesktop.org/series/66175/ Shashank Sharma (3): drm: Introduce scaling filter mode property drm/i915: Add support for scaling filters drm/i915: Handle nearest-neighbor scaling filter drivers/gpu/drm/drm_atomic_uapi.c

[Intel-gfx] [RFC 1/2] drm/i915: Indicate integer up-scaling ratios

Nikula Cc: Ville Syrjälä Cc: Daniel Vetter Cc: Vivi, Rodrigo Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 21 +++ .../drm/i915/display/intel_display_types.h| 7 +++ 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [RFC 2/2] drm/i915: Pick nearest-neighbor mode for integer scaling ratios

display HW only. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Daniel Vetter Cc: Vivi, Rodrigo Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 81 +++- drivers/gpu/drm/i915/i915_reg.h | 31 2 files changed, 111 insertions(+),

[Intel-gfx] [RFC 0/2] Enable Nearest-neighbor for Integer mode scaling

Intel display (ICL), when the upscaling ratio is integer. Shashank Sharma (2): drm/i915: Indicate integer up-scaling ratios drm/i915: Pick nearest-neighbor mode for integer scaling ratios drivers/gpu/drm/i915/display/intel_display.c | 97 ++- .../drm/i915/display

[Intel-gfx] [PATCH v4 0/4] Enable Multi-segmented-gamma for ICL

This patch series enables programming of Multi-segmented-gamma palette for ICL. Shashank Sharma (3): drm/i915: Change gamma/degamma_lut_size data type to u32 drm/i915: Rename ivb_load_lut_10_max drm/i915/icl: Add Multi-segmented gamma support Uma Shankar (1): drm/i915/icl: Add register

[Intel-gfx] [PATCH v4 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32

ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar V4: Added Uma's r-b. Reviewed-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/dr

[Intel-gfx] [PATCH v4 4/4] drm/i915/icl: Add Multi-segmented gamma support

ilk_lut_12p4_ldw Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Daniel Vetter Reviewed-by: Ville Syrjälä Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 2 +- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma

the end of line. - Change the comment at start of ICL multisegmented gamma registers. Added Ville's r-b Cc: Ville Syrjälä Cc: Jani Nikula Cc: Maarten Lankhorst Reviewed-by: Ville Syrjälä Signed-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/

[Intel-gfx] [PATCH v4 3/4] drm/i915: Rename ivb_load_lut_10_max

This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. V3: Added Vill'es r-b. Cc: Uma Shankar Suggested-by: Ville Syrjala Reviewed-by: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 14 +++--- 1 file changed, 7 inser

[Intel-gfx] [PATCH] drm/i915: Fix skl plane scaling for planner YUV buffers

From: Lukas Rusak Plane scaling for YUV planar formats should be max 2 times. Cc: Maarten Lankhorst Cc: Juha-pekka Heikkila Cc: Shashank Sharma Signed-off-by: Lukas Rusak --- drivers/gpu/drm/i915/intel_display.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff

[Intel-gfx] [PATCH v3 3/4] drm/i915: Rename ivb_load_lut_10_max

This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. V3: Added Vill'es r-b. Cc: Uma Shankar Suggested-by: Ville Syrjala Reviewed-by: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 14 +++--- 1 file changed, 7 inser

[Intel-gfx] [PATCH v3 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma

the end of line. - Change the comment at start of ICL multisegmented gamma registers. Added Ville's r-b Cc: Ville Syrjälä Cc: Jani Nikula Cc: Maarten Lankhorst Reviewed-by: Ville Syrjälä Signed-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/

[Intel-gfx] [PATCH v3 0/4] Enable Multi-segmented-gamma for ICL

This patch series enables programming of Multi-segmented-gamma palette for ICL. Shashank Sharma (3): drm/i915: Change gamma/degamma_lut_size data type to u32 drm/i915: Rename ivb_load_lut_10_max drm/i915/icl: Add Multi-segmented gamma support Uma Shankar (1): drm/i915/icl: Add register

[Intel-gfx] [PATCH v3 4/4] drm/i915/icl: Add Multi-segmented gamma support

lle Syrjälä Cc: Maarten Lankhorst Cc: Daniel Vetter Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 2 +- drivers/gpu/drm/i915/intel_color.c | 127 - 2 files changed, 124 insertions(

[Intel-gfx] [PATCH v3 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32

ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 5a2e17d6

[Intel-gfx] [PATCH v3 1/2] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

: Ville Syrjala Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_display.c | 26 -- drivers/gpu/drm/i915/intel_sprite.c | 10 -- 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/icl: Handle YCbCr to RGB conversion for BT2020 case

From: Uma Shankar Currently input csc for YCbCR to RGB conversion handles only BT601 and Bt709. Extending it to support BT2020 as well. Signed-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_sprite.c | 24 1 file changed, 24

[Intel-gfx] [PATCH v2] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

enables the corresponding color conversion mode on plane CSC. PS: renamed variable plane_color_ctl to color_ctl for 80 char stuff. V2: Expose the YCBCR_BT2020 value in enum values of supported encoding formats. Cc: Ville Syrjala Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank

[Intel-gfx] [PATCH] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

enables the corresponding color conversion mode on plane CSC. PS: renamed variable plane_color_ctl to color_ctl for 80 char stuff. Cc: Ville Syrjala Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_display.c | 26 -- 1 file

[Intel-gfx] [PATCH v2 4/4] drm/i915/icl: Add Multi-segmented gamma support

Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 3 +- drivers/gpu/drm/i915/intel_color.c | 125 - 2 files changed, 123 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [PATCH v2 3/4] drm/i915: Rename ivb_load_lut_10_max

This patch renames function ivb_load_lut_10_max to ivb_load_lut_ext_max. Cc: Uma Shankar Suggested-by: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma

ned-off-by: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6f0a0866c802..7d10b8d00d64 100644 --- a/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v2 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32

ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 5a2e17d6

[Intel-gfx] [PATCH v2 0/4] Enable Multi-segmented-gamma for ICL

This patch series enables programming of Multi-segmented-gamma palette for ICL. Shashank Sharma (3): drm/i915: Change gamma/degamma_lut_size data type to u32 drm/i915: Rename ivb_load_lut_10_max drm/i915/icl: Add Multi-segmented gamma support Uma Shankar (1): drm/i915/icl: Add register

[Intel-gfx] [PATCH 3/3] drm/i915/icl: Add Multi-segmented gamma support

etter Suggested-by: Ville Syrjälä Signed-off-by: Shashank Sharma Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_pci.c| 3 +- drivers/gpu/drm/i915/intel_color.c | 155 - 2 files changed, 156 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 2/3] drm/i915/icl: Add register definitions for Multi Segmented gamma

From: Uma Shankar Add macros to define multi segmented gamma registers Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/d

[Intel-gfx] [PATCH 1/3] drm/i915: Change gamma/degamma_lut_size data type to u32

ille Syrjälä Cc: Maarten Lankhorst Cc: Uma Shankar Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_device_info.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 5a2e17d6

[Intel-gfx] [PATCH v12 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

From: Shashank Sharma This patch adds support for YCBCR 4:4:4 CRTC output format. To do this, this patch extends the existing YCBCR 4:2:0 framework by: - Adding new parameter in for YCBCR 4:4:4 enum crtc_iutput_format. - Adding case for YCBCR 4:4:4 in while setting AVI infoframes. - Adding

[Intel-gfx] [PATCH v12 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

checkpatch warnings for alignment V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed, 116 insertions

[Intel-gfx] [PATCH v12 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

From: Shashank Sharma LSPCON is a DP branch device, so LSPCON vendors define specific methods to pass AVI infoframes to the the chip. This patch adds: - a generic wrapper function for writing AVI infoframes for all LSPCON devices. - a vendor specific function to wrire AVI infoframes into MCA

[Intel-gfx] [PATCH v12 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

From: Shashank Sharma Currently, we are using a bool in CRTC state (state->ycbcr420), to indicate modeset, that the output format is YCBCR 4:2:0. Now in order to support other YCBCR formats, we will need more such flags. This patch adds a new enum parameter for YCBCR 4:2:0 outputs, in the C

[Intel-gfx] [PATCH v12 4/8] drm/i915: Check LSPCON vendor OUI

V5: Rebase V6: Rebase V7: Rebase V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 +++

[Intel-gfx] [PATCH v12 1/8] drm/i915: Introduce CRTC output format

checkpatch) V8: Another check[atch warning for alignment V9: Rebase V10: Rebase on top of DSI restructure V11: Addressed review comment from Ville - Set CRTC format for pre-HSW get_pipe_config() function too. Added Ville's R-B Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-o

[Intel-gfx] [PATCH v12 5/8] drm/i915: Add AVI infoframe support for LSPCON

changes in intel_git_port fptrs (set_infoframes and infoframe_enabled) Cc: Ville Syrjala Cc: Imre Deak Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +

[Intel-gfx] [PATCH v12 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

From: Shashank Sharma LSPCON chips can generate YCBCR outputs, if asked nicely :). In order to generate YCBCR 4:2:0 outputs, a source must: - send YCBCR 4:4:4 signals to LSPCON - program color space as 4:2:0 in AVI infoframes Whereas for YCBCR 4:4:4 outputs, the source must: - send YCBCR 4:4:4

[Intel-gfx] [PATCH v11 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

arning Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + drivers/gpu/drm/i915/intel_lspcon.c | 88

[Intel-gfx] [PATCH v10 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

ne TRANS_MSA_CLRSP_YCBCR (2<<3) V9: Rebase V10: Rebase Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH v10 5/8] drm/i915: Add AVI infoframe support for LSPCON

e Deak Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lsp

[Intel-gfx] [PATCH v10 4/8] drm/i915: Check LSPCON vendor OUI

V5: Rebase V6: Rebase V7: Rebase V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 +++

[Intel-gfx] [PATCH v10 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

ngs V8: Rebase V9: Rebase V10: Rebase Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c

[Intel-gfx] [PATCH v10 1/8] drm/i915: Introduce CRTC output format

checkpatch) V8: Another check[atch warning for alignment V9: Rebase V10: Rebase on top of DSI restructure Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_crt.c | 3 +++ drivers/gpu/drm/i915/intel_display.c | 17 + drivers/gpu/drm/i915/intel_dp.c | 1 + drive

[Intel-gfx] [PATCH v10 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

using this CRTC output framework. Sharma, Shashank (2): drm/i915: Check LSPCON vendor OUI drm/i915: Write AVI infoframes for MCA LSPCON Shashank Sharma (6): drm/i915: Introduce CRTC output format drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915: Add CRTC output format YCBCR 4:4:4 drm

[Intel-gfx] [PATCH v10 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

ala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 72 +--- drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH v10 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

checkpatch warnings for alignment V8: Rebase V9: Rebase V10: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed, 116 insertions

[Intel-gfx] [PATCH v10 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

le Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + drivers/gpu/drm/i915/intel_lspcon.c | 89 + 3 files changed, 95 insertion

[Intel-gfx] [PATCH v9 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

eviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + drivers/gpu/drm/i915/intel_lspcon.c | 89 + 3 files changed, 95 insertions(+) diff --git a/drivers/gp

[Intel-gfx] [PATCH v9 5/8] drm/i915: Add AVI infoframe support for LSPCON

Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lsp

[Intel-gfx] [REBASE v9 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

rames into MCA LSPCON devices. V2: Rebase V3: Added r-b from Maarten V4: Rebase V5: Rebase V6: Rebase V7: Fixed checkpatch warnings for alignment V8: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gp

[Intel-gfx] [REBASE v9 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

e TRANS_MSA_CLRSP_YCBCR (2<<3) Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/intel_display.c |

[Intel-gfx] [REBASE v9 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

checkpatch warnings for alignment V8: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed, 116 insertions(+), 1 deletion(-) diff

[Intel-gfx] [REBASE v9 5/8] drm/i915: Add AVI infoframe support for LSPCON

Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lsp

[Intel-gfx] [REBASE v9 4/8] drm/i915: Check LSPCON vendor OUI

V5: Rebase V6: Rebase V7: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 inse

[Intel-gfx] [REBASE v9 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

ngs V8: Rebase Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c| 2 ++ 4 files chang

[Intel-gfx] [REBASE v9 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

ala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 72 +--- drivers/gpu/drm/i915/inte

[Intel-gfx] [REBASE v9 1/8] drm/i915: Introduce CRTC output format

checkpatch) V8: Another check[atch warning for alignment V9: Rebase Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_crt.c | 3 +++ drivers/gpu/drm/i915/intel_display.c | 17 + drivers/gpu/drm/i915/intel_dp.c | 1 + drivers/gpu/drm/i915/intel_dp_mst.c | 1

[Intel-gfx] [REBASE v9 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

->get_config(). - V7 fixes alignment warnings from checkpatch. - V8 fixes more alignment warnings from checkpatch. - V9 is just with rebase Sharma, Shashank (2): drm/i915: Check LSPCON vendor OUI drm/i915: Write AVI infoframes for MCA LSPCON Shashank Sharma (6): drm/i915: Introduce C

[Intel-gfx] [PATCH] drm/i915: Add LSPCON's information in i915_display_info

la Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_debugfs.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 785b710..4582757 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++

[Intel-gfx] [PATCH v8 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

checkpatch warnings for alignment V8: Fixed another checkpatch warning for alignment Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed

[Intel-gfx] [PATCH v8 1/8] drm/i915: Introduce CRTC output format

checkpatch) V8: Another check[atch warning for alignment Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_crt.c | 3 +++ drivers/gpu/drm/i915/intel_display.c | 17 + drivers/gpu/drm/i915/intel_dp.c | 1 + drivers/gpu/drm/i915/intel_dp_mst.c | 1 + drivers/gp

[Intel-gfx] [PATCH v7 1/8] drm/i915: Introduce CRTC output format

checkpatch) Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_crt.c | 3 +++ drivers/gpu/drm/i915/intel_display.c | 17 + drivers/gpu/drm/i915/intel_dp.c | 1 + drivers/gpu/drm/i915/intel_dp_mst.c | 1 + drivers/gpu/drm/i915/intel_drv.h | 8 d

[Intel-gfx] [PATCH v7 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

rames into MCA LSPCON devices. V2: Rebase V3: Added r-b from Maarten V4: Rebase V5: Rebase V6: Rebase V7: Fixed checkpatch warnings for alignment Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH v7 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

aarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 72 +--- drivers/gpu/drm/i915/intel_drv.h | 4

[Intel-gfx] [PATCH v7 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

gs Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c| 2 ++ 4 files changed, 14 inse

[Intel-gfx] [PATCH v7 4/8] drm/i915: Check LSPCON vendor OUI

V5: Rebase V6: Rebase V7: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 inse

[Intel-gfx] [PATCH v7 5/8] drm/i915: Add AVI infoframe support for LSPCON

y: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lspcon.c | 49

[Intel-gfx] [PATCH v7 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

->get_config(). - V7 fixes alignment warnings from checkpatch. Sharma, Shashank (2): drm/i915: Check LSPCON vendor OUI drm/i915: Write AVI infoframes for MCA LSPCON Shashank Sharma (6): drm/i915: Introduce CRTC output format drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915: Add C

[Intel-gfx] [PATCH v7 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

checkpatch warnings for alignment Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 117 +++- 1 file changed, 116 insertions(+), 1 deletion(-) diff --git a

[Intel-gfx] [PATCH v7 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

S_MSA_CLRSP_YCBCR (2<<3) Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/intel_display.c | 12 ++

[Intel-gfx] [PATCH v6 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

khorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c| 2 ++ 4 files changed, 14 insertions(+), 5 deletions(-) diff --git a/d

[Intel-gfx] [PATCH v6 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

es to accommodate changes in patch 2. Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/intel_display.c | 12 dr

[Intel-gfx] [PATCH v6 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

->get_config(). Sharma, Shashank (3): drm/i915: Check LSPCON vendor OUI drm/i915: Write AVI infoframes for MCA LSPCON drm/i915: Write AVI infoframes for Parade LSPCON Shashank Sharma (5): drm/i915: Introduce CRTC output format drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915:

[Intel-gfx] [PATCH v6 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

t Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 72 +--- drivers/gpu/drm/i915/intel_drv.h | 4 +- drivers/gpu/drm/i915/intel_hdmi.c| 6

[Intel-gfx] [PATCH v6 5/8] drm/i915: Add AVI infoframe support for LSPCON

Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lspcon.c | 49 + 4 files c

[Intel-gfx] [PATCH v6 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

rebase V6: rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 119 +++- 1 file changed, 118 insertions(+), 1 deletion(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH v6 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

rames into MCA LSPCON devices. V2: Rebase V3: Added r-b from Maarten V4: Rebase V5: Rebase V6: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/in

[Intel-gfx] [PATCH v6 1/8] drm/i915: Introduce CRTC output format

put_format. - Initialize parameters of output_format_str respectively (Jani N). - Call it intel_output_format than crtc_output_format(Ville). - Set output format in pipe_config for every encoder (Ville). - Get rid of extra DRM_DEBUG_KMS during get_pipe_config (Ville) V6: Rebase Signed-off-by: Shash

[Intel-gfx] [PATCH v6 4/8] drm/i915: Check LSPCON vendor OUI

V5: Rebase V6: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 insertions(+),

[Intel-gfx] [PATCH v5 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0

ically. - Use ARRAY_SIZE(format_str) for output format validity check (Ville) Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers

[Intel-gfx] [PATCH v5 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4

yrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c| 2 ++ 4 files changed, 14 insertions

[Intel-gfx] [PATCH v5 4/8] drm/i915: Check LSPCON vendor OUI

5: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 insertions(+), 14 delet

[Intel-gfx] [PATCH v5 6/8] drm/i915: Write AVI infoframes for MCA LSPCON

rames into MCA LSPCON devices. V2: Rebase V3: Added r-b from Maarten V4: Rebase V5: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdm

[Intel-gfx] [PATCH v5 7/8] drm/i915: Write AVI infoframes for Parade LSPCON

rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 119 +++- 1 file changed, 118 insertions(+), 1 deletion(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH v5 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

arten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/intel_display.c | 9 + drivers/gpu/drm/i915/intel_dp.c | 4 drivers/gpu/drm

[Intel-gfx] [PATCH v5 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON

drm/i915: Add AVI infoframe support for LSPCON drm/i915: Write AVI infoframes for MCA LSPCON drm/i915: Write AVI infoframes for Parade LSPCON Shashank Sharma (4): drm/i915: Introduce CRTC output format drm/i915: Add CRTC output format YCBCR 4:2:0 drm/i915: Add CRTC output format YCBCR 4:4:4

[Intel-gfx] [PATCH v5 5/8] drm/i915: Add AVI infoframe support for LSPCON

nkhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lspcon.c | 49

[Intel-gfx] [PATCH v5 1/8] drm/i915: Introduce CRTC output format

put_format. - Initialize parameters of output_format_str respectively (Jani N). - Call it intel_output_format than crtc_output_format(Ville). - Set output format in pipe_config for every encoder (Ville). - Get rid of extra DRM_DEBUG_KMS during get_pipe_config (Ville) Signed-off-by: Shashank Sharma --- drive

[Intel-gfx] [PATCH v4 5/7] drm/i915: Write AVI infoframes for MCA LSPCON

rames into MCA LSPCON devices. V2: Rebase V3: Added r-b from Maarten V4: Rebase Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 4 ++ drivers/gpu/drm/i915/intel_hdmi.c | 2 + d

[Intel-gfx] [PATCH v4 7/7] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON

ing. Cc: Ville Syrjala Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 7 +++ drivers/gpu/drm/i915/intel_display.c | 11 ++- drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH v4 6/7] drm/i915: Write AVI infoframes for Parade LSPCON

Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_lspcon.c | 119 +++- 1 file changed, 118 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_lspcon.c b/drive

[Intel-gfx] [PATCH v4 3/7] drm/i915: Check LSPCON vendor OUI

Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Reviewed-by: Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_drv.h| 6 drivers/gpu/drm/i915/intel_lspcon.c | 69 + 2 files changed, 61 insertions(+), 14 deletions(-)

[Intel-gfx] [PATCH v4 4/7] drm/i915: Add AVI infoframe support for LSPCON

Reviewed-by: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c| 19 +++--- drivers/gpu/drm/i915/intel_drv.h| 13 +- drivers/gpu/drm/i915/intel_hdmi.c | 13 +++--- drivers/gpu/drm/i915/intel_lspcon.c | 49 ++

[Intel-gfx] [PATCH v4 1/7] drm/i915: Add CRTC output format YCBCR 4:2:0

t_format to RGB in encoder's compute_config. Cc: Ville Syrjala Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma Reviewed-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_color.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 4 ++- drivers/gpu/drm/i9

[Intel-gfx] [PATCH v4 0/7] YCBCR 4:2:0/4:4:4 output support for LSPCON

: Add YCBCR 4:2:0/4:4:4 support for LSPCON Shashank Sharma (1): drm/i915: Add CRTC output format YCBCR 4:4:4 drivers/gpu/drm/i915/i915_reg.h | 2 + drivers/gpu/drm/i915/intel_color.c | 3 +- drivers/gpu/drm/i915/intel_ddi.c | 30 ++- drivers/gpu/drm/i915/intel_display.c | 83

[Intel-gfx] [PATCH v4 2/7] drm/i915: Add CRTC output format YCBCR 4:4:4

sequence. V3: Added this patch in the series V4: Added r-b from Maarten (for v3) Addressed review comment from Ville: Do not use (config->output_format > CRTC_OUTPUT_RGB) Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_color.c

[Intel-gfx] [PATCH] drm/i915: Add HAS_NATIVE_HDMI2 macro

GLK/GEN 10 and higher GEN platfomrs sport native HDMI 2.0 controller. This patch adds a macro HAS_NATIVE_HDMI2, and uses it to make checks in the code more readable. Cc: Vivi Rodrigo Cc: Ville Syrjala Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm

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