On Wed, Feb 12, 2025 at 08:57:10AM +0200, Raag Jadav wrote:
> On Tue, Feb 04, 2025 at 12:35:23PM +0530, Raag Jadav wrote:
> > This series introduces device wedged event in DRM subsystem and uses it
> > in xe, i915 and amdgpu drivers. Detailed description in commit message.
> >
> > This was earlier
nt.
> No functional changes.
Well, there is one functional change that is the clientlist iterator
and the clientlist_mutex hold. So I would avoid the statement of
no functional change. But indeed it seems there's not relevant
functional changes...
the code itself looks right to me:
On Tue, Feb 11, 2025 at 04:57:03PM +0100, Jacek Lawrynowicz wrote:
> Hi, can I submit this to drm-misc or should someone commit this to drm-intel?
This is drm-intel. More specifically drm-intel-gt-next.
Since Joonas had some concerns on the v1, let's wait for him to check if
the provided answers
On Thu, Feb 06, 2025 at 09:43:54PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/6/2025 1:34 PM, Zhuo, Qiuxu wrote:
> > Hi,
> >
> > I got the compile error as below.
> > My GCC is: gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0
> > kernel: v6.14-rc1
>
> Hi Qiuxu,
>
> Thanks for the mail.
>
> Fix was sent
On Thu, Feb 06, 2025 at 09:11:42AM -0500, Rodrigo Vivi wrote:
> Hi Dave and Sima,
>
> Here goes the first i915 fixes towards 6.14.
>
> It looks that our CI was dead for the last round, but I double
> checked locally in both ADL-P and DG2 and everything is working fine.
>
Hi Dave and Sima,
Here goes the first i915 fixes towards 6.14.
It looks that our CI was dead for the last round, but I double
checked locally in both ADL-P and DG2 and everything is working fine.
In the last round the only addition was the Jani's DP fix, that
looks correct. So, let's move forward
Hi Dave and Sima,
Here goes our first Xe related fixes towards 6.14.
Thanks,
Rodrigo.
drm-xe-fixes-2025-02-06:
UAPI Changes:
- OA uAPI related fixes (Ashutosh)
Driver Changes:
- Fix SRIOV migration initialization (Michal)
- Restore devcoredump to a sane state (Lucas)
The following changes si
On Tue, Feb 04, 2025 at 03:42:28PM +0200, Jani Nikula wrote:
> Switch the IS_() checks to display->platform., and
> drop a number of struct drm_i915_private pointers in the process.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/di
* Disable SSA Precharge when CD clock frequency < 500 MHz,
>* enable otherwise.
>*/
> - if ((IS_GEMINILAKE(i915) || IS_BROXTON(i915)) &&
> + if ((display->platform.geminilake || display->platform.broxton) &&
> cdclk >=
el_ddi_buf_trans.c
> index 9389b295036e..a238be5bc455 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -3,13 +3,13 @@
> * Copyright © 2020 Intel Corporation
> */
>
> -#include "i91
spcon_init(struct intel_digital_port *dig_port);
> bool intel_lspcon_active(struct intel_digital_port *dig_port);
> -bool lspcon_detect_hdr_capability(struct intel_digital_port *dig_port);
> -void lspcon_resume(struct intel_digital_port *dig_port);
> -void lspcon_wait_pcon_mode(struc
On Tue, Feb 04, 2025 at 03:58:42PM +0200, Jani Nikula wrote:
> There are no users left for dp_to_lspcon(), remove it. The only two
> users of enc_to_intel_lspcon() are in intel_lspcon.c, so hide it there.
>
> v2: Rebase
Reviewed-by: Rodrigo Vivi
>
> Signed-o
e lspcon structs as entry
but looking to the patch itself the code gets cleaner because
digport is an information that is broadly available. So, let's
continue:
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 +-
On Tue, Feb 04, 2025 at 03:58:40PM +0200, Jani Nikula wrote:
> Switch from struct intel_lspcon to struct intel_digital_port to unify,
> and return the value so the caller doesn't have to look at
> lspcon->hdr_detected directly.
Reviewed-by: Rodrigo Vivi
>
> Sig
On Tue, Feb 04, 2025 at 03:58:39PM +0200, Jani Nikula wrote:
> Hide the direct lspcon->active use behind intel_lspcon_active().
>
Reviewed-by: Rodrigo Vivi
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c| 6 +++---
> drivers/gpu/drm/i9
On Tue, Feb 04, 2025 at 03:58:38PM +0200, Jani Nikula wrote:
> The functions are located in intel_hdmi.c, put the declarations in
> intel_hdmi.h.
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.h | 9 +
>
d)
> v3: Generic implementation in DRM subsystem (Lucas)
> v4: Change authorship to Raag (Aravind)
>
> Signed-off-by: Raag Jadav
> Reviewed-by: Aravind Iddamsetty
Acked-by: Rodrigo Vivi
to merge this through drm-misc-next
> ---
> drivers/gpu/drm/xe/xe_device.c | 7 ++-
&
On Tue, Feb 04, 2025 at 12:35:27PM +0530, Raag Jadav wrote:
> Now that we have device wedged event provided by DRM core, make use
> of it and support both driver rebind and bus-reset based recovery.
> With this in place, userspace will be notified of wedged device on
> gt reset failure.
>
> Signed
On Tue, Jan 21, 2025 at 09:42:17AM -0500, Rodrigo Vivi wrote:
> On Sat, Jan 18, 2025 at 06:47:27PM +0100, Michal Wajdeczko wrote:
> >
> >
> > On 17.01.2025 22:57, Vinay Belgaumkar wrote:
> > > Default SLPC power profile is Base(0). Power Saving mode(1)
> > &
On Sun, Feb 02, 2025 at 10:14:31PM +, Colin Ian King wrote:
> There is a spelling mistake in an error message. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu
On Sun, Feb 02, 2025 at 06:28:08AM -0800, Guenter Roeck wrote:
> On 2/2/25 05:27, David Laight wrote:
> > On Tue, 21 Jan 2025 15:15:09 -0800
> > Linus Torvalds wrote:
> >
> > > On Tue, 21 Jan 2025 at 14:59, Rodrigo Vivi wrote:
> > > >
> > >
On Mon, Feb 03, 2025 at 06:51:17PM +0200, Imre Deak wrote:
> On Mon, Feb 03, 2025 at 11:42:11AM -0500, Rodrigo Vivi wrote:
> > On Mon, Feb 03, 2025 at 06:27:17PM +0200, Imre Deak wrote:
> > > On Mon, Feb 03, 2025 at 11:12:34AM -0500, Rodrigo Vivi wrote:
> > > > On M
On Mon, Feb 03, 2025 at 06:27:17PM +0200, Imre Deak wrote:
> On Mon, Feb 03, 2025 at 11:12:34AM -0500, Rodrigo Vivi wrote:
> > On Mon, Feb 03, 2025 at 06:01:25PM +0200, Imre Deak wrote:
> > > On Mon, Feb 03, 2025 at 10:45:58AM -0500, Rodrigo Vivi wrote:
> > > > On M
On Mon, Feb 03, 2025 at 06:01:25PM +0200, Imre Deak wrote:
> On Mon, Feb 03, 2025 at 10:45:58AM -0500, Rodrigo Vivi wrote:
> > On Mon, Feb 03, 2025 at 05:14:10PM +0200, Imre Deak wrote:
> > > On Mon, Feb 03, 2025 at 11:59:59AM -0300, Gustavo Sousa wrote:
> > > > Quoti
On Mon, Feb 03, 2025 at 11:23:23AM +0200, Jani Nikula wrote:
> On Mon, 03 Feb 2025, Mohammed Thasleem wrote:
> > Starting from MTl we don't have a platform agnostic way to validate DC6
> > state
> > due to dc6 counter has been removed to validate DC state.
> > Adding dc6_entry_counter at display
On Mon, Feb 03, 2025 at 05:14:10PM +0200, Imre Deak wrote:
> On Mon, Feb 03, 2025 at 11:59:59AM -0300, Gustavo Sousa wrote:
> > Quoting Imre Deak (2025-02-03 11:26:19-03:00)
> > >On Mon, Feb 03, 2025 at 10:39:54AM -0300, Gustavo Sousa wrote:
> > >> Quoting Imre Deak (2025-02-03 09:43:38-03:00)
> >
; issues.
> >
> > Reported-by: Linux Kernel Functional Testing
> > Closes:
> > https://lore.kernel.org/all/CA+G9fYtNfM399_=_ff81zeRJv=0+z7oFJfPGmJgTp6y
> > rjmu...@mail.gmail.com/
> > Fixes: 160672b86b0d ("drm/i915/dp: Use clamp for pipe_bpp limits with
>
On Wed, Jan 01, 2025 at 05:39:21PM +0200, Alexander Usyskin wrote:
> Enable runtime PM in mtd driver to notify graphics driver that
> whole card should be kept awake while nvm operations are
> performed through this driver.
>
> CC: Lucas De Marchi
> Acked-by: Miquel Raynal
> Signed-off-by: Alexa
On Wed, Jan 01, 2025 at 05:39:24PM +0200, Alexander Usyskin wrote:
> Enable access to internal non-volatile memory on DGFX
> with GSC/CSC devices via a child device.
> The nvm child device is exposed via auxiliary bus.
>
> Reviewed-by: Rodrigo Vivi
Since this patch needs a rebase
On Tue, Jan 28, 2025 at 08:54:10AM +, MARDI Youness wrote:
>Hello,
>
>
>
>
On Mon, Jan 20, 2025 at 02:42:14PM +0100, Maarten Lankhorst wrote:
> Hey,
>
> Den 2025-01-17 kl. 23:09, skrev Rodrigo Vivi:
> > Start the xe-i915-display reconciliation by using the same
> > shutdown sequences.
> >
> > v2: include the stubs for !CONFIG_DRM_XE_DIS
On Thu, Jan 23, 2025 at 10:16:07PM -0500, Rodrigo Vivi wrote:
> On Wed, Jan 22, 2025 at 01:15:31PM +0200, Giedrius Statkevičius wrote:
> > Hello,
> >
> > On Mon, 4 Nov 2024 at 23:28, Rodrigo Vivi wrote:
> > >
> > > On Mon, Nov 04, 2024 at 02:09:
On Sat, Jan 25, 2025 at 12:38:46AM +, li...@treblig.org wrote:
> From: "Dr. David Alan Gilbert"
>
> The last use of live_context_for_engine() was removed in 2021 by
> commit 99919be74aa3 ("drm/i915/gem: Zap the i915_gem_object_blt code")
>
> Re
6db86b ("drm/i915/mtl: do not enable render power-gating on MTL")
> Cc: Rodrigo Vivi
> Cc: Andi Shyti
> Cc: Andrzej Hajda
> Signed-off-by: Badal Nilawar
> ---
> drivers/gpu/drm/i915/gt/intel_rc6.c | 19 ---
> .../gpu/drm/i915/selftests/i91
the previous email and
I know I know... there's a lot of those in this file already :/
I was thinking of another name for this function as well since
it is only stopping the running state, but I'm bad with naming...
let's move on and close the real issue
Reviewed-by: Rodrigo Vivi
On Wed, Jan 22, 2025 at 01:15:31PM +0200, Giedrius Statkevičius wrote:
> Hello,
>
> On Mon, 4 Nov 2024 at 23:28, Rodrigo Vivi wrote:
> >
> > On Mon, Nov 04, 2024 at 02:09:46PM +0200, Giedrius Statkevičius wrote:
> > > Hello,
> > >
> > > Kind p
On Thu, Jan 23, 2025 at 12:41:26PM +0200, Joonas Lahtinen wrote:
> Quoting Rodrigo Vivi (2025-01-21 18:14:51)
> > On Mon, Jan 20, 2025 at 01:45:12PM +0530, Nitin Gote wrote:
> > > Fix all typos in files under drm/i915/gem reported by codespell tool.
> > >
> > &g
This aligns with the current i915 display sequence.
Cc: Maarten Lankhort
Reviewed-by: Jonathan Cavitt
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/display/xe_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c
b
Start the xe-i915-display reconciliation by using the same
shutdown sequences.
v2: include the stubs for !CONFIG_DRM_XE_DISPLAY (Kunit)
Reviewed-by: Jonathan Cavitt
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/display/xe_display.c | 48 +++--
drivers/gpu/drm/xe
fix
Cc: Imre Deak
Reviewed-by: Jonathan Cavitt #v1
Signed-off-by: Rodrigo Vivi
---
.../drm/i915/display/intel_display_driver.c | 42 +++
.../drm/i915/display/intel_display_driver.h | 3 ++
drivers/gpu/drm/i915/i915_driver.c| 27 ++--
3 files changed, 49
On Tue, Jan 21, 2025 at 03:58:03PM -0800, Umesh Nerlige Ramappa wrote:
> On Tue, Jan 21, 2025 at 06:10:34PM -0500, Rodrigo Vivi wrote:
> > On Tue, Jan 21, 2025 at 02:25:57PM -0800, Umesh Nerlige Ramappa wrote:
> >
> > drm/i915/pmu as tag please...
>
> will do
>
On Tue, Jan 21, 2025 at 02:25:57PM -0800, Umesh Nerlige Ramappa wrote:
drm/i915/pmu as tag please...
> When running igt@gem_exec_balancer@individual for multiple iterations,
> it is seen that the delta busyness returned by PMU is 0. The issue stems
> from a combination of 2 implementation specifi
zed-by: Linus Torvalds
> Suggested-by: Linus Torvalds
> Suggested-by: David Laight
> Cc: David Laight
> Cc: Jani Nikula
> Cc: Andy Shevchenko
> Signed-off-by: Guenter Roeck
Reviewed-by: Rodrigo Vivi
I'm pushing this soon to drm-intel-next, unless Linus want to take
thi
On Mon, Jan 20, 2025 at 02:42:14PM +0100, Maarten Lankhorst wrote:
> Hey,
>
> Den 2025-01-17 kl. 23:09, skrev Rodrigo Vivi:
> > Start the xe-i915-display reconciliation by using the same
> > shutdown sequences.
> >
> > v2: include the stubs for !CONFIG_DRM_XE_DIS
On Mon, Jan 20, 2025 at 01:45:12PM +0530, Nitin Gote wrote:
> Fix all typos in files under drm/i915/gem reported by codespell tool.
>
> v2: Codespell won't catch it, but it should be
> "user defined" and not "use defined".
>
> Signed-off-by: Nitin Gote
> ---
> drivers/gpu/drm/i915/gem/i915
On Sat, Jan 18, 2025 at 06:47:27PM +0100, Michal Wajdeczko wrote:
>
>
> On 17.01.2025 22:57, Vinay Belgaumkar wrote:
> > Default SLPC power profile is Base(0). Power Saving mode(1)
> > has conservative up/down thresholds and is suitable for use with
> > apps that typically need to be power effici
This aligns with the current i915 display sequence.
Cc: Maarten Lankhort
Reviewed-by: Jonathan Cavitt
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/display/xe_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c
b
Reviewed-by: Jonathan Cavitt #v1
Signed-off-by: Rodrigo Vivi
---
.../drm/i915/display/intel_display_driver.c | 40 +++
.../drm/i915/display/intel_display_driver.h | 3 ++
drivers/gpu/drm/i915/i915_driver.c| 27 ++---
3 files changed, 47 insertions(+), 23
Start the xe-i915-display reconciliation by using the same
shutdown sequences.
v2: include the stubs for !CONFIG_DRM_XE_DISPLAY (Kunit)
Reviewed-by: Jonathan Cavitt
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/display/xe_display.c | 48 +++--
drivers/gpu/drm/xe
mat and add some kernel doc for SLPC (Rodrigo)
>
> v3: Update doc with info about power profiles (Rodrigo)
>
> Cc: Sushma Venkatesh Reddy
> Cc: Rodrigo Vivi
> Signed-off-by: Vinay Belgaumkar
> ---
> drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 47 +
>
On Fri, Jan 17, 2025 at 10:21:53AM -0800, Belgaumkar, Vinay wrote:
>
> On 1/17/2025 6:29 AM, Rodrigo Vivi wrote:
> > On Thu, Jan 16, 2025 at 03:51:03PM -0800, Belgaumkar, Vinay wrote:
> > > On 1/16/2025 2:57 PM, Rodrigo Vivi wrote:
> > > > On Fri, Jan 10
On Thu, Jan 16, 2025 at 03:51:03PM -0800, Belgaumkar, Vinay wrote:
>
> On 1/16/2025 2:57 PM, Rodrigo Vivi wrote:
> > On Fri, Jan 10, 2025 at 03:21:51PM -0800, Vinay Belgaumkar wrote:
> > > Default SLPC power profile is Base(0). Power Saving mode(1)
> > > has conserva
mat and add some kernel doc for SLPC (Rodrigo)
>
> Cc: Sushma Venkatesh Reddy
> Cc: Rodrigo Vivi
> Signed-off-by: Vinay Belgaumkar
> ---
> drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 47 +++
> drivers/gpu/drm/i915/gt/intel_rps.c | 4 ++
> .../d
On Thu, Jan 16, 2025 at 06:24:36PM +0200, Jani Nikula wrote:
> On Thu, 16 Jan 2025, Rodrigo Vivi wrote:
> > On Thu, Jan 16, 2025 at 03:24:16PM +0530, Ankit Nautiyal wrote:
> >> While setting the bounds for compressed bpp we ensure that the
> >> compressed bp
On Thu, Jan 16, 2025 at 03:24:16PM +0530, Ankit Nautiyal wrote:
> While setting the bounds for compressed bpp we ensure that the
> compressed bpp is less than the pipe bpp.
>
> This gives an issue with 420 output format where effective link bpp is
> half that of the pipe bpp. Therefore instead of
On Wed, Jan 08, 2025 at 04:04:15PM +0200, Jani Nikula wrote:
> The intel prefix is more accurate for display stuff. Rename.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_audio.c | 82 +++---
> 1 file chan
ev(dev_priv->drm.dev);
> + struct pci_dev *pdev = to_pci_dev(display->drm->dev);
> struct platform_device_info pinfo = {};
> struct resource *rsc;
> struct platform_device *platdev;
> @@ -98,7 +98,8 @@ lpe_audio_platdev_create(struct drm_i915_priv
ic PCH
handling: HAS_PCH_CPT(i915) and HAS_PCH_IBX(i915) ?!
But well, the really audio portion is, so up to you.
> Do some minor checkpatch
> fixes while at it.
I couldn't spot it! :)
anyway
Reviewed-by: Rodrigo Vivi
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/d
On Sat, Jan 11, 2025 at 02:12:17PM +0900, Zhenyu Wang wrote:
> On Thu, Jan 09, 2025 at 04:10:24PM -0500, Rodrigo Vivi wrote:
> > On Mon, Jan 06, 2025 at 04:30:20PM +0900, Zhenyu Wang wrote:
> > > On Sun, Dec 22, 2024 at 12:25:09AM +, Dr. David Alan Gilbert wrote:
ot;drm/i915/mtl: do not enable render power-gating on MTL")
> Cc: Rodrigo Vivi
> Cc: Andi Shyti
> Cc: Andrzej Hajda
> Signed-off-by: Badal Nilawar
> ---
> drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/d
ecision on platform basis (Vinay)
- Limit change to MTL and beyond, where GuC started to take
TDP limit into consideration.
v3: Fix compilation. Actually amend the changes...
Reviewed-by: Vinay Belgaumkar #v1
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_s
drm/xe: Fix all typos in xe
Rodrigo Vivi (1):
drm/xe: Introduce the RPa information
Vinay Belgaumkar (1):
drm/xe/slpc: Remove unnecessary force wakes
drivers/gpu/drm/xe/Kconfig.debug | 4 +-
drivers/gpu/drm/xe/abi/guc_capture_abi.h | 2 +-
drivers/gpu/drm/x
Let's peek on the Balancer and DCC status, now that we
are using the default strategies.
v2: fix identation
v3: fix typo (Vinay)
Reviewed-by: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +
1 file changed, 17 inser
On Wed, Jan 08, 2025 at 09:13:14AM -0500, Rodrigo Vivi wrote:
> The goal here is to improve the GPU performance in some cases
> where we are TDP limited, with both GPU and CPU with high
> utilization and PCODE without power to fulfill both sides.
> Of course, only matters for integrate
On Mon, Jan 06, 2025 at 04:30:20PM +0900, Zhenyu Wang wrote:
> On Sun, Dec 22, 2024 at 12:25:09AM +, Dr. David Alan Gilbert wrote:
> > Note: zhen...@linux.intel.com's address bounces:
> >
>
> yeah, I've left Intel so can't use that box any more, looks Rodrigo hasn't
> queue up my address chan
he
> > error, as it doesn't necessarily mean selftest failure.
> >
> > Signed-off-by: Raag Jadav
> > ---
>
> Rodrigo, does this look okay?
Acked-by: Rodrigo Vivi
>
> Raag
>
> > drivers/gpu/drm/i915/gt/selftest_rps.c | 11 ++-
> >
On Wed, Jan 08, 2025 at 09:18:41PM -0800, Dixit, Ashutosh wrote:
> On Wed, 08 Jan 2025 13:19:16 -0800, Rodrigo Vivi wrote:
> >
>
> Hi Rodrigo,
>
> > On Wed, Jan 08, 2025 at 11:30:59AM -0800, Dixit, Ashutosh wrote:
> > > On Wed, 08 Jan 2025 11:11:
On Wed, Jan 08, 2025 at 12:16:50PM +1100, Stephen Rothwell wrote:
> Hi All,
>
> On Mon, 6 Jan 2025 13:03:48 +1100 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the drm-intel tree got a conflict in:
> >
> > drivers/gpu/drm/i915/display/intel_display_driver.c
> >
> > between co
On Wed, Jan 08, 2025 at 11:30:59AM -0800, Dixit, Ashutosh wrote:
> On Wed, 08 Jan 2025 11:11:53 -0800, Belgaumkar, Vinay wrote:
> >
> >
> > On 1/8/2025 6:13 AM, Rodrigo Vivi wrote:
> > > The Balancer and DCC strategies were left off on a fear that
> > > t
Let's peak on the Balancer and DCC status, now that we
are using the default strategies.
v2: fix identation
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gp
CPU and we can expect some delays
here. This number was a random picked number when reducing
it on commit d4b02a4c613e ("drm/i915/selftests: Trim execlists
runtime") in preparation for some scheduler improvements.
Let's move it back up.
Signed-off-by: Rodrigo Vivi
---
drive
more of GT frequency.
Without these strategies we were likely leaving some performance
behind on some scenarious.
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/gpu/d
s,
Rodrigo.
Rodrigo Vivi (3):
drm/i915: Increase the timeout of the spinners
drm/i915/guc/slpc: Enable GuC SLPC default strategies
drm/i915/guc/slpc: Print more SLPC debug status information
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 34 ++--
drivers/gpu/drm/i915
On Mon, Dec 30, 2024 at 02:24:45PM +, Krzysztof Karas wrote:
> Hi Apoorva and Andi,
>
> > > Initialize rq to NULL to prevent uninitialized pointer reads.
> >
> > where is it happening?
> >
> > Andi
>
> There are two instances that I see:
> 1) err = fn(..., &rq); <- this probably will set th
ges
drm/i915/dg2: Introduce DG2_D subplatform
drm/i915: Introduce intel_cpu_info.c for CPU IDs
drm/i915/dg2: Implement Wa_14022698537
Rodrigo Vivi (9):
drm/i915: Remove vga and gmbus seq out of i915_restore_display
drm/i915/display: Convert i915_suspend into i9xx_display_sr
On Fri, Jan 03, 2025 at 12:38:43PM +, Bhadane, Dnyaneshwar wrote:
>
>
> > -Original Message-
> > From: Kandpal, Suraj
> > Sent: Friday, January 3, 2025 2:15 PM
> > To: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > Cc: Bhadane, Dnyaneshwar ; Kandpal,
> > Suraj
>
rruptible wait when moving BO to system
drm/xe: Wait for migration job before unmapping pages
drm/xe/tests: Move shrink test out of xe_bo
Rodrigo Vivi (2):
drm/xe/pm: Also avoid missing outer rpm warning on system suspend
drm/xe/dg1: Fix power gate sequence.
Thomas Hellström
Lucas, Thomas, thoughts?
>
> Or in case the conclusion ends up being "yes", then lets at least share some
> more code between intel_gpu_top and this work. Ie. make it in a way gputop
> completely subsumes and replaces intel_gpu_top might be an idea.
with this I agree as wel
On Wed, Dec 11, 2024 at 03:38:46PM -0500, Rodrigo Vivi wrote:
> Hi Dave and Sima,
>
> Here goes our first drm-intel-next round targeting 6.14.
>
> One drm/print change coming from here. The rest is mostly
> display changes and one GSC FW update for ARL platforms.
>
> Tha
rst place.
>
> Signed-off-by: Sebastian Brzezinka
> Reviewed-by: Andi Shyti
> Signed-off-by: Andi Shyti
> ---
> Cc: Andi Shyti
>
> Hi,
>
> this patch for some reason did not reach the mailing list and it
> missed all the CI premerge tests. I am resending it, th
Cc: Vinay Belgaumkar
Cc: Himal Prasad Ghimiray
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index c864d101faf9..9378d5901c49 100644
---
On Tue, Nov 19, 2024 at 04:01:08PM +0200, Alexander Usyskin wrote:
> Enable runtime PM in mtd driver to notify graphics driver that
> whole card should be kept awake while nvm operations are
> performed through this driver.
>
> CC: Lucas De Marchi
> Acked-by: Miquel Raynal
> Signed-off-by: Alexa
On Tue, Nov 19, 2024 at 04:01:05PM +0200, Alexander Usyskin wrote:
> Implement read(), erase() and write() functions.
>
> CC: Lucas De Marchi
> CC: Rodrigo Vivi
> Acked-by: Miquel Raynal
> Co-developed-by: Tomas Winkler
> Signed-off-by: Tomas Winkler
> Co-dev
On Tue, Nov 19, 2024 at 04:01:04PM +0200, Alexander Usyskin wrote:
> In intel-dg, there is no access to the spi controller,
> the information is extracted from the descriptor region.
>
> CC: Rodrigo Vivi
> CC: Lucas De Marchi
> Acked-by: Miquel Raynal
> Co-developed-by: To
On Mon, Dec 16, 2024 at 04:57:04PM -0800, Vinay Belgaumkar wrote:
> Default SLPC power profile is Base(0). Power Saving mode(1)
> has conservative up/down thresholds and is suitable for use with
> apps that typically need to be power efficient.
>
> Cc: Sushma Venkatesh Reddy
>
Let's peak on the Balancer and DCC status, now that we
are using the default strategies.
v2: fix identation
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gp
Let's peak on the Balancer and DCC status, now that we
are using the default strategies.
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/
more of GT frequency.
Without these strategies we were likely leaving some performance
behind on some scenarious.
Cc: Vinay Belgaumkar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/drivers/gpu/d
They are complementary to waitboost and they can potentially improve
performance in some very limited cases like when system is in high
cpu and gpu usage and under TDP constrains.
Signed-off-by: Rodrigo Vivi
Rodrigo Vivi (2):
drm/i915/guc/slpc: Enable GuC SLPC default strategies
drm/i915
ught the goal was to *unify* i915 and xe display init/cleanup. This
> > diverges them more, with actually functionally different things rather
> > than just slightly different ordering.
> >
> > BR,
> > Jani.
> >
> >
> > >
> > > Reviewed
e: Trace xe_bo_validate
drm/xe: Avoid evicting object of the same vm in none fault mode
Raag Jadav (1):
drm/xe/throttle: Log throttle reasons
Randy Dunlap (1):
drm/xe/vm_doc: fix more doc typos
Rodrigo Vivi (2):
Merge drm/drm-next into drm-xe-next
Merge drm/drm-next in
g4x_dp_set_clock() call to g4x_dp_compute_config()
Jiasheng Jiang (1):
drm/i915: Fix memory leak by correcting cache object name in error handler
Jouni Högander (1):
drm/i915/psr: Disable Panel Replay as well if VRR is enabled
Rodrigo Vivi (8):
drm/i915: Remove vga and gmbus seq o
On Sun, Dec 08, 2024 at 03:17:27PM +, Ed Maste wrote:
> These two files (i915_live_selftests.h, i915_mock_selftests.h) were
> introduced in commit 953c7f82eb89 ("drm/i915: Provide a hook for
> selftests") and are effectively just a list of selftests.
>
> The selftest implementation itself is l
On Tue, Dec 10, 2024 at 09:00:13AM -0800, Lucas De Marchi wrote:
> On Mon, Dec 09, 2024 at 03:53:51PM +0200, Luca Coelho wrote:
> > This reverts commit 560af5dc839eef08a273908f390cfefefb82aa04.
> >
> > Signed-off-by: Luca Coelho
> > ---
> >
> > It seems that we have a few issues with this config
On Tue, Dec 10, 2024 at 10:53:10AM +0200, Raag Jadav wrote:
> On Mon, Dec 09, 2024 at 11:28:39AM -0500, Rodrigo Vivi wrote:
> > On Sat, Dec 07, 2024 at 08:14:42AM +0200, Raag Jadav wrote:
> > > Cc: Chris
> > >
> > > On Fri, Dec 06, 2024 at 10:45:18AM -0500, Rod
On Sat, Dec 07, 2024 at 08:14:42AM +0200, Raag Jadav wrote:
> Cc: Chris
>
> On Fri, Dec 06, 2024 at 10:45:18AM -0500, Rodrigo Vivi wrote:
> > On Thu, Dec 05, 2024 at 01:44:13PM +0530, Raag Jadav wrote:
> > > Log throttle reasons on selftest failure which will be us
On Thu, Dec 05, 2024 at 01:44:13PM +0530, Raag Jadav wrote:
> Log throttle reasons on selftest failure which will be useful for
> debugging.
>
> Signed-off-by: Raag Jadav
> ---
> drivers/gpu/drm/i915/gt/selftest_rps.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git
On Thu, Dec 05, 2024 at 03:47:35PM +, Sebastian Brzezinka wrote:
> `wa_verify`sporadically detects lost workaround on application; this
> is unusual behavior since wa are applied at `intel_gt_init_hw` and
> verified right away by `intel_gt_verify_workarounds`, and `wa_verify`
> doesn't fail on
On Mon, Nov 04, 2024 at 01:41:03PM -0800, Zhanjun Dong wrote:
> GuC to host communication is interrupt driven, the handling has 3
> parts: interrupt context, tasklet and request queue worker.
> During GuC reset prepare, interrupt is disabled before destroy
> contexts steps start. The IRQ and worker
On Fri, Nov 29, 2024 at 01:25:14PM -0500, Rodrigo Vivi wrote:
> On Fri, Nov 29, 2024 at 01:37:54PM -0300, Gustavo Sousa wrote:
> > We will need to flush the release work from outside in an upcoming
> > change. Let's put that into a public interface and call it
> > intel
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