[Intel-gfx] GuC based SLPC

Hello All, Could some one please let me know who can we contact for the below patch series https://patchwork.freedesktop.org/series/2691/ https://patchwork.freedesktop.org/series/11356/ The mail-ids mentioned in patchwork are failing. Thanks, Kedar __

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Get active pending request for given context

: I10c2828ad0f1a0b7af147835737134e07a2d5b6d Please remove these. We will remove the Change-Ids in subsequent patches, thanks. Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanje Signed-off-by: Ankit Navik What are you trying to convey with the five

[Intel-gfx] [PATCH 4/4] drm/i915: Predictive governor to control eu/slice/subslice based on workload

-off-by: Kedar J Karanje Signed-off-by: Ankit Navik --- drivers/gpu/drm/i915/i915_debugfs.c | 94 - drivers/gpu/drm/i915/i915_drv.h | 1 + 2 files changed, 94 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type

configuration from pre-defined optimum configuration table(opt_config). Change-Id: I3a6a2a6b01b3d3c97995f5403aef3c6fa989 Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanje Signed-off-by: Ankit Navik --- drivers

[Intel-gfx] [PATCH 1/4] drm/i915: Get active pending request for given context

From: Praveen Diwakar This patch gives us the active pending request count which is yet to be submitted to the GPU Change-Id: I10c2828ad0f1a0b7af147835737134e07a2d5b6d Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J

[Intel-gfx] [PATCH 0/4][RFC] Dynamic EU configuration of Slice/Subslice/EU.

From: "Kedar J. Karanje" drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel Current GPU configuration code for i915 does not allow us to change EU/Slice/Sub-slice configuration dynamically. Its done only once while context is created. While particula

[Intel-gfx] [PATCH 2/4] drm/i915: Update render power clock state configuration for given context

. Change-Id: I4e7d2f484b957d5bd496e1decc59a69e3bc6d186 Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanje Signed-off-by: Ankit Navik --- drivers/gpu/drm/i915/i915_gem_context.c | 5 drivers/gpu/drm/i915