ebase
v7: * Remove extraneous is_edp() prototype (Rodrigo)
v8: Rebase
Cc: Chris Wilson
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature")
Reviewed-by: Manasi Navare
that is disabled
> by default with the risk of bringing flickerings back.
>
> But even if we decide to go ahead and merge I believe we need to
> resend the test and collect a full round of CI that now runs
> all IGT tests.
I assume you mean resend the patch here. I'll do t
* rebase
v7: * Remove extraneous is_edp() prototype (Rodrigo)
Cc: Chris Wilson
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature")
Signed-off-by: Jim Brid
On Mon, Aug 21, 2017 at 11:27:37PM +, Vivi, Rodrigo wrote:
> On Mon, 2017-08-21 at 14:03 -0700, Jim Bride wrote:
> > This set of changes has some history to them. There were several attempts
> > to add what was called "fast link training" to i915, which actually wasn
ebase
Cc: Chris Wilson
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature")
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 2 ++
drive
On Fri, Aug 18, 2017 at 12:30:20PM +0300, Jani Nikula wrote:
> Expose across driver for future work. No functional changes.
Reviewed-by: Jim Bride
> Cc: Manasi Navare
> Cc: Jim Bride
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i91
gh the retry loop has not reached max retries.
> So we need to consider this as a failure condition.
>
Reviewed-by: Jim Bride
> Signed-off-by: Manasi Navare
> Cc: Jim Bride
> Cc: Jani Nikula
> Cc: Ville Syrjala
> ---
> drivers/gpu/drm/i915/intel_dp_link_training.c | 4
On Fri, Aug 18, 2017 at 12:30:19PM +0300, Jani Nikula wrote:
> Emphasize that this is based on the port, not intel_dp. This is also in
> line with the underlying intel_bios_is_port_edp() function. No
> functional changes.
Reviewed-by: Jim Bride
> Cc: Manasi Navare
> Cc: Jim Brid
On Thu, Aug 17, 2017 at 12:20:03PM -0700, Manasi Navare wrote:
> On Thu, Aug 17, 2017 at 10:50:04AM -0700, Jim Bride wrote:
> > On Wed, Aug 16, 2017 at 03:13:06PM -0700, Manasi Navare wrote:
> > > On Wed, Aug 09, 2017 at 02:21:07PM -0700, Jim Bride wrote:
> > > >
On Wed, Aug 16, 2017 at 03:13:06PM -0700, Manasi Navare wrote:
> On Wed, Aug 09, 2017 at 02:21:07PM -0700, Jim Bride wrote:
> > This set of changes has some history to them. There were several attempts
> > to add what was called "fast link training" to i915, which actu
On Tue, Aug 15, 2017 at 04:41:52PM -0700, Rodrigo Vivi wrote:
> On Tue, Aug 15, 2017 at 9:58 AM, Jim Bride wrote:
> > On Wed, Aug 09, 2017 at 01:40:00PM -0700, Jim Bride wrote:
> >> According to the eDP spec, when the count field in TEST_SINK_MISC
> >> increments the
On Thu, Aug 10, 2017 at 04:13:44PM +0300, Jani Nikula wrote:
> On Wed, 09 Aug 2017, Jim Bride wrote:
> > Some fixed resolution panels actually support more than one mode,
> > with the only thing different being the refresh rate. Having this
> > alternate mode availab
o Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature")
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 4 +++-
drivers/gpu/drm/i915/intel_dp_link_training.c | 15 +++
* Rebase
v3: * Rebase
v4: * Switch from do-while to for loop when reading CRC values (Jani)
* Rebase
v5: * Checkpatch cleanup and commit message tweaks
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/inte
David)
* Rebase
Cc: David Weinehall
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Cc: Chris Wilson
Reviewed-by: David Weinehall
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c| 38 +-
drivers/gpu/drm/i915/intel_drv.h | 2 ++
dr
age wording (Rodrigo)
Cc: Rodrigo Vivi
Cc: Chris Wilson
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_re
On Tue, Aug 08, 2017 at 07:42:50PM +, Vivi, Rodrigo wrote:
> On Tue, 2017-08-08 at 08:51 -0700, Jim Bride wrote:
> > Bit 29 of SRD_CTL needs to have its value preserved,
>
> probably good to kind of quote spec somehow:
> "This field is used for hardware communicat
Bit 29 of SRD_CTL needs to have its value preserved, so right before we
write out the register we go ahead and read the register and preserve
the value of that bit before we write out the configured register value.
Cc: Rodrigo Vivi
Cc: Chris Wilson
Cc: Jani Nikula
Signed-off-by: Jim Bride
On Mon, Aug 07, 2017 at 08:55:00AM -0700, Jim Bride wrote:
> On Fri, Aug 04, 2017 at 10:29:33AM +0300, Jani Nikula wrote:
> > On Thu, 03 Aug 2017, Jim Bride wrote:
> > > On Fri, Jul 14, 2017 at 12:34:28PM +0300, Jani Nikula wrote:
> > >> On Wed, 12 Jul 2017, Chris W
On Fri, Aug 04, 2017 at 06:38:02PM +, Pandiyan, Dhinakaran wrote:
>
>
>
> On Thu, 2017-08-03 at 11:07 -0700, Rodrigo Vivi wrote:
> > On Tue, Jul 18, 2017 at 2:34 PM, Jim Bride
> > wrote:
> > > According to the eDP spec, when the count field in TEST_SINK_M
On Fri, Aug 04, 2017 at 10:29:33AM +0300, Jani Nikula wrote:
> On Thu, 03 Aug 2017, Jim Bride wrote:
> > On Fri, Jul 14, 2017 at 12:34:28PM +0300, Jani Nikula wrote:
> >> On Wed, 12 Jul 2017, Chris Wilson wrote:
> >> > Quoting Dhinakaran Pandiyan (2017-07-12 09:47:2
On Fri, Jul 14, 2017 at 12:34:28PM +0300, Jani Nikula wrote:
> On Wed, 12 Jul 2017, Chris Wilson wrote:
> > Quoting Dhinakaran Pandiyan (2017-07-12 09:47:25)
> >> On Tuesday, July 11, 2017 3:19:53 PM PDT Jim Bride wrote:
> >> > On SKL+ there is a bit in SRD_CTL th
Chris Wilson
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c| 38 +-
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/intel_lvds.c
On Tue, Jul 25, 2017 at 08:13:03PM +0300, David Weinehall wrote:
> On Tue, Jul 25, 2017 at 09:48:07AM -0700, Jim Bride wrote:
> > These patches, along with an upcoming series for IGT, enable our
> > PSR IGT tests to run reliably once again on HSW, BDW, and SKL.
> > The first
Paulo Zanoni
Cc: Wayne Boyer
Cc: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_psr.c | 21 +++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_re
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature")
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 4 +++-
drivers/gpu/drm/i915/intel_dp_link_training.c | 15 ++-
driv
* Rebase
v3: * Rebase
v4: * Switch from do-while to for loop when reading CRC values (Jani)
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 33 ++---
1 file changed, 30 insertions(+),
patches for details)
* Rebase
Jim Bride (4):
drm/i915/psr: Clean-up intel_enable_source_psr1()
drm/i915/psr: Account for sink CRC raciness on some panels
drm/i915/edp: Be less aggressive about changing link config on eDP
drm/i915/edp: Allow alternate fixed mode for eDP if available
the use of the alternate mode if it's
available and it was specifically requested.
v2 and v3: Rebase
v4: * Fix up some leaky mode stuff (Chris)
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Cc: Chris Wilson
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c
* Rebase
v3: * Rebase
v4: * Switch from do-while to for loop when reading CRC values (Jani)
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 33 ++---
1 file changed, 30 insertions(+),
the use of the alternate mode if it's
available and it was specifically requested.
v2 and v3: Rebase
v4: * Fix up some leaky mode stuff (Chris)
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Cc: Chris Wilson
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c
Paulo Zanoni
Cc: Wayne Boyer
Cc: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_psr.c | 21 +++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_re
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature")
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 4 +++-
drivers/gpu/drm/i915/intel_dp_link_training.c | 15 ++-
driv
On Fri, Jul 14, 2017 at 12:46:08PM +0300, Jani Nikula wrote:
> On Tue, 11 Jul 2017, Jim Bride wrote:
> > According to the eDP spec, when the count field in TEST_SINK_MISC
> > increments then the six bytes of sink CRC information in the DPCD
> > should be valid. Unfortunate
On Wed, Jul 12, 2017 at 02:53:36PM -0700, Manasi Navare wrote:
> On Wed, Jul 12, 2017 at 10:38:03PM +0100, Chris Wilson wrote:
> > Quoting Manasi Navare (2017-07-12 22:36:49)
> > > On Wed, Jul 12, 2017 at 12:16:13AM +0100, Chris Wilson wrote:
> > > > Quoting
On Wed, Jul 12, 2017 at 12:27:33AM +0100, Chris Wilson wrote:
> Quoting Jim Bride (2017-07-11 23:19:55)
> > @@ -5869,13 +5891,14 @@ static bool intel_edp_init_connector(struct
> > intel_dp *intel_dp,
> > }
> > intel_connector->edid = edid;
> >
Add igt_psr_active() which returns whether PSR is active or not and modify
tests to use this function.
Signed-off-by: Jim Bride
---
lib/igt_psr.c| 19 +++
lib/igt_psr.h| 1 +
tests/kms_fbcon_fbt.c| 5 +
tests
RC
is retrieved in binary form.
Signed-off-by: Jim Bride
---
lib/igt_psr.c| 59
lib/igt_psr.h| 2 ++
tests/kms_frontbuffer_tracking.c | 25 ++
tests/kms_psr_sink_crc.c
Make assert_or_manual() a macro so that we get accurate line number
information when this assertion fails.
v2: Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jim Bride
---
tests/kms_psr_sink_crc.c | 10 +-
1 file changed, 5 insertions(+), 5
This work-around actually causes issues on HSW now. Without this
code in-place I'm seeing good results on HSW.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_frontbuffer_tracking.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/
The multidraw subtest was not taking whether or not the GEM buffer had
ever been in write-combining mode when checking for PSR state, so fix
that.
Reviewed-by: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_frontbuffer_tracking.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
Signed-off-by: Jim Bride
---
lib/igt_psr.c| 34 +
lib/igt_psr.h| 2 ++
tests/kms_fbcon_fbt.c| 4
tests/kms_frontbuffer_tracking.c | 2 +-
tests/kms_psr_sink_crc.c | 41
Signed-off-by: Jim Bride
---
lib/igt_psr.c| 13 +
lib/igt_psr.h| 1 +
tests/kms_frontbuffer_tracking.c | 5 +
3 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index d27c32a..8dda659 100644
Signed-off-by: Jim Bride
---
lib/igt_psr.c| 12
lib/igt_psr.h| 1 +
tests/kms_fbcon_fbt.c| 28
tests/kms_frontbuffer_tracking.c | 17 +
tests/kms_psr_sink_crc.c | 16
W and SKL:
* kms_psr_sink_crc (all)
* kms_frontbuffer_tracking (subtests psr-1p* and fbcpsr-1p*)
* kms_fbcon_fbt (subtests psr*)
Note: Based on review feedback the changes in this series were
substantially restructured vs. previous versions.
Jim Bride (11):
Add functions to tell whether the source and sink support PSR as well
as a function to determine whether PSR is possible (both source and
sink support PSR.) Also modify the PSR tests to use these functions.
Signed-off-by: Jim Bride
---
lib/Makefile.sources | 1 +
lib/igt_psr.c
Signed-off-by: Jim Bride
---
lib/igt_psr.c| 11 +++
lib/igt_psr.h| 1 +
tests/kms_frontbuffer_tracking.c | 12 +++-
tests/kms_psr_sink_crc.c | 2 +-
4 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/lib/igt_psr.c b
Create files to contain PSR-specific IGT functions and add macros
to enable and disable PSR.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
lib/Makefile.sources | 1 +
lib/igt.h| 1 +
lib/igt_psr.h| 30
Wayne Boyer
Cc: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_psr.c | 21 +++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gp
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Reviewed-by: Rodrigo Vivi
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/
the use of the alternate mode if it's
available and it was specifically requested.
v2: Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c| 34 +-
drivers/gpu/drm/i915/intel_drv.h
)
* Reduce amount of changes in the sink CRC patch (Jani)
* Field-wise init of EDP_PSR_MAX_SLEEP_TIME (Rodrigo)
* Minor commit message / cover letter tweaks
v3:
* Re-ordered patches to put reviewed patches first.
* Rebased to current drm-tip
Jim Bride (4):
drm/i915/psr: Clean-up
ecent link training changes
that Manasi has implemented, and PSR on Skylake is definitely more happy
with these changes in-place.
v2: Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link
r to review and to make sure that we are not changing the behaviour.
I'm testing a new series with the requested structural changes and review
feedback to-date. I hope to send them out on Monday (testing takes a while.)
Jim
> also...
>
> On Fri, Jun 30, 2017 at 12:12 PM, Jim
On Fri, Jun 30, 2017 at 05:54:32PM -0300, Paulo Zanoni wrote:
> Em Sex, 2017-06-30 às 12:12 -0700, Jim Bride escreveu:
> > Factor out some code that was replicated in three test utilities into
> > some new IGT library functions so that we are checking PSR status in
> > a cons
On Fri, Jun 30, 2017 at 01:11:52PM -0700, Rodrigo Vivi wrote:
> On Fri, Jun 30, 2017 at 12:12 PM, Jim Bride wrote:
> > Factor out some code that was replicated in three test utilities into
> > some new IGT library functions so that we are checking PSR status in
> > a consiste
v2: * Minor functional tweaks and bug fixes
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_fbcon_fbt.c | 54 +--
1 file changed, 18 insertions(+), 36 deletions(-)
diff --git a/tests/kms_fbcon_fbt.c b/tests
Signed-off-by: Jim Bride
---
lib/Makefile.sources | 2 +
lib/igt.h| 1 +
lib/igt_psr.c| 235 +++
lib/igt_psr.h| 43 ++
4 files changed, 281 insertions(+)
create mode 100644 lib/igt_psr.c
create mode 100644
The multidraw subtest was not taking whether or not the GEM buffer had
ever been in write-combining mode when checking for PSR state, so fix
that.
Signed-off-by: Jim Bride
---
tests/kms_frontbuffer_tracking.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests
v2: * Minor functional tweaks & bug fixes
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_psr_sink_crc.c | 134 +++
1 file changed, 66 insertions(+), 68 deletions(-)
diff --git a/tests/kms_psr_sink_crc
v2: * Minor functional tweaks and bug fixes
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_frontbuffer_tracking.c | 119 +++
1 file changed, 19 insertions(+), 100 deletions(-)
diff --git a/tests
Make assert_or_manual() a macro so that we get accurate line number
information when this assertion fails.
v2: Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_psr_sink_crc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests
s psr*)
BDW and SKL:
* kms_psr_sink_crc (all)
* kms_frontbuffer_tracking (subtests psr-1p* and fbcpsr-1p*)
* kms_fbcon_fbt (all)
Jim Bride (6):
tests/kms_psr_sink_crc: Change assert_or_manual() to a macro
lib: Add PSR utility functions to igt library.
tests/kms_psr_sin
* Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel
Wayne Boyer
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_psr.c | 21 +++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
ecent link training changes
that Manasi has implemented, and PSR on Skylake is definitely more happy
with these changes in-place.
v2: Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Cc: Jani Nikula
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link
the use of the alternate mode if it's
available and it was specifically requested.
v2: Rebase
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c| 34 +-
drivers/gpu/drm/i915/intel_drv.h
)
* Reduce amount of changes in the sink CRC patch (Jani)
* Field-wise init of EDP_PSR_MAX_SLEEP_TIME (Rodrigo)
* Minor commit message / cover letter tweaks
Jim Bride (4):
drm/i915/edp: Allow alternate fixed mode for eDP if available.
drm/i915/psr: Clean-up intel_enable_source_psr1
On Thu, Apr 06, 2017 at 12:15:07PM -0700, Rodrigo Vivi wrote:
> From: Paulo Zanoni
>
> We're going to use it in the next commits.
>
> Signed-off-by: Paulo Zanoni
> Signed-off-by: Rodrigo Vivi
Reviewed-by: Jim Bride
> ---
> drivers/gpu/drm/i915/i915_drv.h |
On Mon, May 08, 2017 at 09:05:08PM +0300, Jani Nikula wrote:
> On Mon, 08 May 2017, Jim Bride wrote:
> > On Mon, May 08, 2017 at 12:12:47PM +0300, Jani Nikula wrote:
> >> On Sat, 06 May 2017, Jim Bride wrote:
> >> > According to the eDP spec, when the
On Mon, May 08, 2017 at 12:12:47PM +0300, Jani Nikula wrote:
> On Sat, 06 May 2017, Jim Bride wrote:
> > According to the eDP spec, when the count field in TEST_SINK_MISC
> > increments then the six bytes of sink CRC information in the DPCD
> > should be valid. Unfortunate
On Mon, May 08, 2017 at 11:41:25AM +0300, Jani Nikula wrote:
> On Sat, 06 May 2017, Jim Bride wrote:
> > This set of changes has some history to them. There were several attempts
> > to add what was called "fast link training" to i915, which actually wasn't
> &
On Mon, May 08, 2017 at 11:54:15AM +0300, Jani Nikula wrote:
> On Sat, 06 May 2017, Jim Bride wrote:
> > Some fixed resolution panels actually support more than one mode,
> > with the only thing different being the refresh rate. Having this
> > alternate mode availab
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_frontbuffer_tracking.c | 95 +---
1 file changed, 10 insertions(+), 85 deletions(-)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index c24e4a8
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_fbcon_fbt.c| 56
tests/kms_psr_sink_crc.c | 36 +--
2 files changed, 49 insertions(+), 43 deletions(-)
diff --git a/tests/kms_fbcon_fbt.c b
Make assert_or_manual() a macro so that we get accurate line number
information when this assertion fails.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_psr_sink_crc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_psr_sink_crc.c | 28
1 file changed, 8 insertions(+), 20 deletions(-)
diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
index 1a03719..8d26b68 100644
--- a/tests
(subtests psr* and fbcpsr*)
* kms_fbcon_fbt (all)
Jim Bride (5):
tests/kms_psr_sink_crc: Change assert_or_manual() to a macro
lib: Add PSR utility functions to igt library.
tests/kms_psr_sink_crc: Refactor to use new PSR library primitives
tests/kms_frontbuffer_tracking: Refactor
Factor out some code that was replicated in three test utilities into
some new IGT library functions so that we are checking PSR status in
a consistent fashion across all of our PSR tests.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
lib/Makefile.sources | 2 +
lib/igt.h
for a time before trying to read. We still see some
occasional failures, but reading the sink CRC is much more reliable,
particularly on SKL and KBL, with these changes than without.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 +++--
d-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_psr.c | 21 +++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ee8170c..3a63555 100644
--- a/dr
ecent link training changes
that Manasi has implemented, and PSR on Skylake is definitely more happy
with these changes in-place.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Manasi D Navare
Cc: Mika Kahola
Fixes: 34511dce4 ("drm/i915: Revert DisplayPort fast link training feature
the use of the alternate mode if it's
available and it was specifically requested.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/intel_dp.c| 34 +-
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm
on
the link state being the same at PSR exit as it was at PSR entry.
The fourth change greatly increases the reliability of reading the
sink CRC generated by the eDP panel.
Jim Bride (4):
drm/i915/edp: Allow alternate fixed mode for eDP if available.
drm/i915/psr: Clean-up
On Mon, Apr 03, 2017 at 05:42:39PM +, Vivi, Rodrigo wrote:
> On Mon, 2017-04-03 at 10:07 -0700, Jim Bride wrote:
> > On SKL+ there is a bit in SRD_CTL that software is not supposed to
> > modify, but we currently clobber that bit when we enable PSR. In
> > order to prese
On Fri, Mar 31, 2017 at 04:25:31PM -0700, Rodrigo Vivi wrote:
> On Mon, Mar 13, 2017 at 1:12 AM, Lee, Shawn C wrote:
> > From: "Lee, Shawn C"
> >
> > Display driver read DPCD register 0x202, 0x203 and 0x204 to identify
> > eDP sink status.If PSR exit is ongoing at eDP sink, and eDP source
> > rea
register back out. Additionally, go ahead and
explicitly disable single-frame update since we aren't currently
supporting it.
Cc: Rodrigo Vivi
Cc: Wayne Boyer
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_psr.c | 23 +
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_frontbuffer_tracking.c | 47
1 file changed, 9 insertions(+), 38 deletions(-)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 4f4848b
Factor out some code that was replicated in three test utilities into
some new IGT library functions so that we are checking PSR status in
a consistent fashion across all of our PSR tests.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
lib/Makefile.sources | 2 +
lib/igt.h
Cc: Rodrigo Vivi
Signed-off-by: Jim Bride
---
tests/kms_psr_sink_crc.c | 53 ++--
1 file changed, 11 insertions(+), 42 deletions(-)
diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
index 8f6bdc0..1d9eb11 100644
--- a/tests
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Jim Bride
---
tests/kms_fbcon_fbt.c | 47 +++
1 file changed, 11 insertions(+), 36 deletions(-)
diff --git a/tests/kms_fbcon_fbt.c b/tests/kms_fbcon_fbt.c
index 6342289..a59257b 100644
--- a/tests
set 1 , if not set,
> flickering is observed on psr2 panel.
>
> v2: (Ilia Mirkin)
> - Remove duplicate bit definition 25:27
>
> Cc: Rodrigo Vivi
> Cc: Jim Bride
> Signed-off-by: Vathsala Nagaraju
> Signed-off-by: Patil Deepti
Reviewed-by: Jim Bride
>
On Mon, Jan 02, 2017 at 05:00:58PM +0530, vathsala nagaraju wrote:
> As per edp1.4 spec , alpm is required for psr2 operation as it's
> used for all psr2 main link power down management and alpm enable
> bit must be set for psr2 operation.
>
> Cc: Rodrigo Vivi
> Cc: Jim
,
> as suggested by rodrigo and jim.
>
> v2: (Vivi Rodrigo)
> - Rename hsw_enable_source_psr* to intel_enable_source_psr*
>
> Cc: Rodrigo Vivi
> Cc: Jim Bride
> Signed-off-by: Vathsala Nagaraju
> Signed-off-by: Patil Deepti
The new naming is much better!
Reviewed-by:
_SU_Y_COORDINATE_REQUIRED
> - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX_*
> - Change VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED to DP_VSC_*
>
> Cc: Rodrigo Vivi
> Cc: Jim Bride
> Signed-off-by: Vathsala Nagaraju
> Signed-off-by: Patil Deepti
Reviewed-by: Jim Bride
> ---
> d
On Wed, Dec 07, 2016 at 02:04:52PM -0800, Manasi Navare wrote:
> This is the userspace component of the Displayport Compliance
> testing software required for compliance testing of the I915
> Display Port driver. This must be running in order to successfully
> complete Display Port compliance testi
_ctl instead of srd_status and srd_ctl for
> psr2 scenario.
>
> Cc: Rodrigo Vivi
> Cc: Jim Bride
> Signed-off-by: vathsala nagaraju
Reviewed-by: Jim Bride
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++
> drivers/gpu/drm/i915/intel_psr.c | 79
> +
On Fri, Dec 09, 2016 at 11:42:09PM +0530, vathsala nagaraju wrote:
> For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
> for psr1, bit 31 in SRD_CTL to be set. Reporting
> "HW Enabled & Active bit" status for psr2 from SRD_CTL
> gives wrong status.
>
> C
On Tue, Oct 25, 2016 at 03:17:47PM +0300, Jani Nikula wrote:
> On Sat, 22 Oct 2016, Manasi Navare wrote:
> > If link training at a link rate optimal for a particular
> > mode fails during modeset's atomic commit phase, then we
> > let the modeset complete and then retry. We save the link rate
> >
On Fri, Oct 21, 2016 at 04:45:43PM -0700, Manasi Navare wrote:
> If link training at a link rate optimal for a particular
> mode fails during modeset's atomic commit phase, then we
> let the modeset complete and then retry. We save the link rate
> value at which link training failed and use a lower
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