On Fri, 6 Aug 2021, Zhenyu Wang wrote:
Thanks for the fix! Otherwise Windows VM is unusable with recent kernel.
Reviewed-by: Colin Xu
We've seen recent regression with host and windows VM running
simultaneously that cause gpu hang or even crash. Finally bisect to
commit 58586680ffad
.org
https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
Reviewed-by: Colin Xu
--
Best Regards,
Colin Xu
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2.31.0
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Reviewed-by: Colin Xu
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Best Regards,
Colin Xu
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t_init(struct
device *dev,
/**
* intel_gvt_hypervisor_host_exit - exit GVT-g host side
*/
-static inline void intel_gvt_hypervisor_host_exit(struct device *dev)
+static inline void intel_gvt_hypervisor_host_exit(struct device *dev, void
*gvt)
{
/* optional to provide */
if (!intel_gvt_host.mpt->
intel_gvt_suspend() if fail to save GGTT.
V6:
Save host entry to per-vGPU gtt.ggtt_mm on each host_entry update so
only need the resume routine.
V7:
Refresh.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a
fence restore and mmio restore in different functions.
Colin Xu (2):
drm/i915/gvt: Save/restore HW status to support GVT suspend/resume
drm/i915/gvt: Add GVT resume routine to i915
drivers/gpu/drm/i915/gvt/gtt.c | 64 +
drivers/gpu/drm/i915/gvt/gtt.h | 4
memory to save
ggtt. Free allocated ggtt_entries on failure.
V6:
Save host entry to per-vGPU gtt.ggtt_mm on each host_entry update.
V7:
Restore GGTT entry based on present bit.
Split fence restore and mmio restore in different functions.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers
On 2020-10-27 09:49, Zhenyu Wang wrote:
On 2020.10.27 08:42:40 +0800, Colin Xu wrote:
On 2020-10-26 17:19, Zhenyu Wang wrote:
On 2020.10.23 16:17:19 +0800, Colin Xu wrote:
This patch save/restore necessary GVT info during i915 suspend/resume so
that GVT enabled QEMU VM can continue running
On 2020-10-26 17:19, Zhenyu Wang wrote:
On 2020.10.23 16:17:19 +0800, Colin Xu wrote:
This patch save/restore necessary GVT info during i915 suspend/resume so
that GVT enabled QEMU VM can continue running.
Only GGTT and fence regs are saved/restored now. GVT will save GGTT
entries on each
intel_gvt_suspend() if fail to save GGTT.
V6:
Save host entry to per-vGPU gtt.ggtt_mm on each host_entry update so
only need the resume routine.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915
flags to indicate which MMIOs to save/restore for PM.
V4:
Rebase.
V5:
Fail intel_gvt_pm_suspend if fail to save ggtt.
V6:
Save host entry to per-vGPU gtt.ggtt_mm on each host_entry update so
that no need to read from HW and save during suspend.
Colin Xu (2):
drm/i915/gvt: Save/restore HW status
memory to save
ggtt. Free allocated ggtt_entries on failure.
V6:
Save host entry to per-vGPU gtt.ggtt_mm on each host_entry update.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/gtt.c | 75 +
drivers/gpu/drm/i915/gvt/gtt.h | 9
On 2020-10-16 16:13, Colin Xu wrote:
This patch add gvt suspend/resume wrapper into i915: i915_drm_suspend()
and i915_drm_resume(). GVT relies on i915 so suspend gvt ahead of other
i915 sub-routine and resume gvt at last.
V2:
- Direct call into gvt suspend/resume wrapper in intel_gvt.h
will check and call gvt routine. (zhenyu)
V3:
Refresh.
V4:
Rebase.
V5:
Fail intel_gvt_suspend() if fail to save GGTT.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b
flags to indicate which MMIOs to save/restore for PM.
V4:
Rebase.
V5:
Fail intel_gvt_pm_suspend if fail to save ggtt.
Colin Xu (2):
drm/i915/gvt: Save/restore HW status for GVT during suspend/resume
drm/i915/gvt: Add GVT suspend/resume routine to i915
drivers/gpu/drm/i915/gvt/gtt.c | 88
memory to save
ggtt. Free allocated ggtt_entries on failure.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/gtt.c | 88 +
drivers/gpu/drm/i915/gvt/gtt.h | 2 +
drivers/gpu/drm/i915/gvt/gvt.c | 14 +
drivers/gpu/drm/i915
On 2020-10-16 14:37, Zhenyu Wang wrote:
On 2020.10.16 14:20:29 +0800, Colin Xu wrote:
On 2020-10-16 13:54, Zhenyu Wang wrote:
On 2020.10.16 13:59:59 +0800, Colin Xu wrote:
This patch save/restore necessary GVT info during i915 suspend/resume so
that GVT enabled QEMU VM can continue running
On 2020-10-16 13:54, Zhenyu Wang wrote:
On 2020.10.16 13:59:59 +0800, Colin Xu wrote:
This patch save/restore necessary GVT info during i915 suspend/resume so
that GVT enabled QEMU VM can continue running.
Only GGTT and fence regs are saved/restored now. GVT will save GGTT
entries into GVT
will check and call gvt routine. (zhenyu)
V3:
Refresh.
V4:
Rebase.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8bb7e2dcfaaa
intel_gvt_active(). (zhenyu)
V3: (zhenyu)
- Incorrect copy length. Should be num entries * entry size.
- Use memcpy_toio()/memcpy_fromio() instead of memcpy for iomem.
- Add F_PM_SAVE flags to indicate which MMIOs to save/restore for PM.
V4:
Rebase.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
flags to indicate which MMIOs to save/restore for PM.
V4:
Rebase.
Colin Xu (2):
drm/i915/gvt: Save/restore HW status for GVT during suspend/resume
drm/i915/gvt: Add GVT suspend/resume routine to i915
drivers/gpu/drm/i915/gvt/gtt.c | 75 +
drivers/gpu/drm/i915
On 2020-09-09 10:06, Zhenyu Wang wrote:
On 2020.09.09 09:43:21 +0800, Colin Xu wrote:
I tested this patch on the suspend/resume case with vGPU created (no need
really activate), can still observer the system freeze issue as mentioned in
another patch I sent. So I suppose we still need
915_gem_ww_ctx_fini(&ww);
s->shadow[i] = ce;
}
@@ -1400,6 +1445,7 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu)
return 0;
out_shadow_ctx:
+ i915_gem_ww_ctx_fini(&ww);
i915_context_ppgtt_root_restore(s, ppgtt);
intel_gvt_active(). (zhenyu)
V3: (zhenyu)
- Incorrect copy length. Should be num entries * entry size.
- Use memcpy_toio()/memcpy_fromio() instead of memcpy for iomem.
- Add F_PM_SAVE flags to indicate which MMIOs to save/restore for PM.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm
will check and call gvt routine. (zhenyu)
V3:
Refresh.
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d66fe09d337e..28055dc65ecd
flags to indicate which MMIOs to save/restore for PM.
Colin Xu (2):
drm/i915/gvt: Save/restore HW status for GVT during suspend/resume
drm/i915/gvt: Add GVT suspend/resume routine to i915
drivers/gpu/drm/i915/gvt/gtt.c | 75 +
drivers/gpu/drm/i915/gvt/gtt.h
On 2020-08-26 17:10, Zhenyu Wang wrote:
On 2020.08.26 14:35:05 +0800, Colin Xu wrote:
This patch save/restore necessary GVT info during i915 suspend/resume so
that GVT enabled QEMU VM can continue running.
Only GGTT and fence regs are saved/restored now. GVT will save GGTT
entries into GVT
will check and call gvt routine. (zhenyu)
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 00292a849c34..99c15a9183c2 100644
--- a
intel_gvt_active(). (zhenyu)
Signed-off-by: Hang Yuan
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/gtt.c | 73 +
drivers/gpu/drm/i915/gvt/gtt.h | 2 +
drivers/gpu/drm/i915/gvt/gvt.c | 15 ++
drivers/gpu/drm/i915/gvt/gvt.h | 6 +++
drivers/gpu/drm
intel_gvt.h/intel_gvt.c and
move the actual implementation to gvt.h/gvt.c. (zhenyu)
- Check gvt config on and active with intel_gvt_active(). (zhenyu)
Colin Xu (2):
drm/i915/gvt: Save/restore HW status for GVT during suspend/resume
drm/i915/gvt: Add GVT suspend/resume routine to i915
drivers/gpu/drm
Enable KVMGT for BXT.
is_supported_device() acting as the gatekeeper of GVT-g init.
If all supported platforms share the same configurations for some
specific feature, platform check will rely on this check only.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/intel_gvt.c | 2 ++
1 file
Leverage most SKL/KBL mmio init info and add different mmio to
BXT specific function init_bxt_mmio_info().
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/handlers.c | 389
1 file changed, 344 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915
Virtual monitor on BXT start from port B.
Unlike SKL/KBL, digital display port connectivity is detected via
GEN8_DE_PORT_ISR so emulate monitor state change by setting it.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/display.c | 23 +++
drivers/gpu/drm/i915/gvt
Handle dma_buf on BXT as SKL and KBL.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/dmabuf.c | 4 +++-
drivers/gpu/drm/i915/gvt/fb_decoder.c | 12 +---
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.c
b/drivers/gpu/drm/i915
BXT forcewake is handled in the same way as SKL/KBL.
v2: Add missing inhibit_context restore for BXT.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/scheduler.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
b/drivers/gpu
Handle BXT cmd_parser as SKL/KBL.
v2: All supported platforms share the same routines.
Remove the platform check by now and let is_supported_device()
be the gate keeper.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 39 ++-
1 file changed
Handle pending tlb flush, mocs/mmio switch and context as KBL.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/mmio_context.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c
b/drivers/gpu/drm/i915/gvt
Initialize BXT irq handler as SKL/KBL.
v2: All supported platforms share the same irq ops and map.
Remove the platform check by now and let is_supported_device()
be the gate keeper.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/interrupt.c | 14 +-
1 file changed, 5
Broxton belongs to GEN9 family so add to SKL and GEN9 plus.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/handlers.c | 2 ++
drivers/gpu/drm/i915/gvt/mmio.h | 11 ++-
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
b
As referred in PRM for Broxton Graphics on 01.org
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c
b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index b51c05d03f14..f65cf4515783 100644
Initialize BXT device info as SKL/KBL.
v2: All supported platforms share the same device configuration.
Remove the platform check by now and let is_supported_device()
be the gate keeper.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/gvt.c | 21 +
1 file
Initialize BXT gtt as SKL/KBL.
v2: All supported platforms share the same gtt ops.
Remove the platform check by now and let is_supported_device()
be the gate keeper.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/gvt/gtt.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions
if all supported platforms share the
same configuration set. is_supported_device() will be the gatekeeper.
- Enable dma_buf for BXT.
- Add inhibit_context restore for BXT.
Colin Xu (12):
drm/i915/gvt: Add D_BXT device type define for BXT.
drm/i915/gvt: Add MEDIA_POOL_STATE for BXT
7;t happen anyway.
Cc: Colin Xu
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c42e389a27f3..18
On 05/31/2018 07:56 PM, Jani Nikula wrote:
Virtualized non-PCH systems such as Broxton or Geminilake should use
PCH_NONE to indicate no PCH rather than PCH_NOP. The latter is a
specific case to indicate a PCH system without south display.
Reported-by: Colin Xu
Cc: Colin Xu
Reviewed-by: Ville
On 05/29/2018 01:45 PM, Jani Nikula wrote:
On Wed, 30 May 2018, Colin Xu wrote:
On 05/28/2018 09:42 PM, Jani Nikula wrote:
On Mon, 28 May 2018, Jani Nikula wrote:
On Mon, 28 May 2018, Jani Nikula wrote:
On Tue, 29 May 2018, colin...@intel.com wrote:
From: Colin Xu
The existing way to
On 05/28/2018 09:42 PM, Jani Nikula wrote:
On Mon, 28 May 2018, Jani Nikula wrote:
On Mon, 28 May 2018, Jani Nikula wrote:
On Tue, 29 May 2018, colin...@intel.com wrote:
From: Colin Xu
The existing way to update virtual PCH will return wrong PCH type
in case the host doesn't hav
From: Colin Xu
On BXT platform, guest kernel request PCH_NONE to initialize display
correctly.
Signed-off-by: Colin Xu
---
drivers/gpu/drm/i915/i915_drv.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index
From: Colin Xu
In recent virtual PCH detection refactoring patch, virtual pch id
is guessed and sanity checked from dev_priv. However, on platform that
has no PCH like BXT, the guessing is wrong by mixing up PCH_NONE with
PCH_NOP.
The patch set handles such situation so that correct virtual
From: Colin Xu
The existing way to update virtual PCH will return wrong PCH type
in case the host doesn't have PCH:
- intel_virt_detect_pch returns guessed PCH id 0
- id 0 maps to PCH_NOP. >> should be PCH_NONE.
Since PCH_NONE and PCH_NOP are different types, mixing them up
wil
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