Reading the Sandy Bridge documentation, on the PCH it lists 3
FDI receiver control registers (A,B,C):
https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3b_register_offsets.pdf
But on the CPU side, FDI_TX_* seems undocumented but according
to the linux driver, sandy bridge only
Reading the Sandy Bridge documentation, on the PCH it lists 3
FDI receiver control registers (A,B,C):
https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3b_register_offsets.pdf
But on the CPU side, FDI_TX_* seems undocumented but according
to the linux driver, sandy bridge only