Hi Joonas,
On Wed, Jun 01, 2016 at 03:49:59PM +0300, Joonas Lahtinen wrote:
> On ti, 2016-05-31 at 22:01 +0800, Zhiyuan Lv wrote:
> > Hi Joonas,
> >
> > On Fri, May 27, 2016 at 02:32:25PM +0300, Joonas Lahtinen wrote:
> > >
> > > On pe, 2016-
Hi Joonas,
On Fri, May 27, 2016 at 02:32:25PM +0300, Joonas Lahtinen wrote:
> On pe, 2016-05-27 at 10:05 +, Wang, Zhi A wrote:
> > For me I think maybe i915 could save the snapshot for GVT, then GVT-g
> > patch the snapshot itself, then there won’t be leaking happened I
> > think. Even we wro
Hi Kevin,
On Tue, Mar 08, 2016 at 10:44:39AM +0800, Tian, Kevin wrote:
> > From: Zhiyuan Lv
> > Sent: Thursday, March 03, 2016 5:51 PM
> >
> > Dear i915 developers,
> >
> > Here I have one topic hoping to get your comments and suggestions.
> > Basicall
Hi Joonas,
On Mon, Mar 07, 2016 at 12:20:48PM +0200, Joonas Lahtinen wrote:
> Hi,
>
> On pe, 2016-03-04 at 23:38 +0800, Zhiyuan Lv wrote:
> > Hi Joonas,
> >
> > On Fri, Mar 04, 2016 at 04:00:27PM +0200, Joonas Lahtinen wrote:
> > >
> > > Hi,
Hi Joonas,
On Fri, Mar 04, 2016 at 04:00:27PM +0200, Joonas Lahtinen wrote:
> Hi,
>
> On to, 2016-03-03 at 17:50 +0800, Zhiyuan Lv wrote:
> > Dear i915 developers,
> >
> > Here I have one topic hoping to get your comments and suggestions.
> > Basically it is abo
Dear i915 developers,
Here I have one topic hoping to get your comments and suggestions.
Basically it is about graphics virtualization(igvt-g), for the purpose
of host system to get virtual machine's framebuffer. We would like to
hear your opinions about some design opens. Below is the
patch and s
Hi Joonas,
On Fri, Feb 05, 2016 at 03:40:49PM +0200, Joonas Lahtinen wrote:
> Hi,
>
> On pe, 2016-02-05 at 18:03 +0800, Zhiyuan Lv wrote:
> > Hi Joonas,
> >
> > Thanks much for the review! We will incorporate those review comments!
> >
> > Meanwhile, is i
Hi Joonas,
Thanks much for the review! We will incorporate those review comments!
Meanwhile, is it good enough to do the host ballooning like below? The
pros is that it is very simple, especially consider that guest
ballooning logic has been there. Thanks!
Regards,
-Zhiyuan
On Thu, Feb 04, 2016
Hi Chris,
On Fri, Jan 29, 2016 at 04:48:07PM +, Chris Wilson wrote:
> On Fri, Jan 29, 2016 at 03:57:09PM +0200, Joonas Lahtinen wrote:
> > Hi,
> >
> > TL;DR Overall, we have same problem as with the scheduler series, there
> > is too much placeholder stuff for easy review. Just squash enough
On Wed, Feb 03, 2016 at 02:01:15PM +0800, Zhi Wang wrote:
> Hi Joonas:
> Thanks you very much! We're very excited for receiving your
> advice and continue to be open to any comments. :)
>
> I'm supposed that we should make the agreements on i915 host change
> at the very beginning, as I'm conc
Hi Joonas,
On Thu, Jan 28, 2016 at 01:33:33PM +0200, Joonas Lahtinen wrote:
> Hi,
>
> See the file MAINTAINERS and add Cc: lines according to "XEN HYPERVISOR
> INTERFACE". Also I think it'll be useful to split the i915 changes to a
> separate patch next int he series (as the reviewer will be diff
On Fri, Nov 20, 2015 at 04:36:15PM +0800, Tian, Kevin wrote:
> > From: Gerd Hoffmann [mailto:kra...@redhat.com]
> > Sent: Friday, November 20, 2015 4:26 PM
> >
> > Hi,
> >
> > > > iGVT-g_Setup_Guide.txt mentions a "Indirect Display Mode", but doesn't
> > > > explain how the guest framebuffer ca
uff to use its own macros.
>
> Cc: Eddie Dong
> Cc: Jike Song
> Cc: Kevin Tian
> Cc: Yu Zhang
> Cc: Zhi Wang
> Cc: Zhiyuan Lv
> Signed-off-by: Ville Syrjälä
It looks good to me. Thanks!
Reviewed-by: Zhiyuan Lv
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 80
&g
simply loop through them.
>
> Cc: Eddie Dong
> Cc: Jike Song
> Cc: Kevin Tian
> Cc: Yu Zhang
> Cc: Zhi Wang
> Cc: Zhiyuan Lv
> Signed-off-by: Ville Syrjälä
It looks good to me. Thanks for the change!
Reviewed-by: Zhiyuan Lv
> ---
> drivers/gpu/drm/i915/i915_
Hi Daniel,
Thanks for the comments! And my reply in line:
On Wed, Sep 02, 2015 at 10:19:03AM +0200, Daniel Vetter wrote:
> > >
> > > Also you obviously have to complete the copying from shadow->guest ctx
> > > before you send the irq to the guest to signal ctx completion. Which means
> > > there
. The fifth patch is
the implementation of the PPGTT notification.
v2:
- Rebase to latest drm-intel-next-queued
- Not to pin/unpin lr contexts and not to send notification for them (Chris)
- Address review comments from reviewers (noted in patches)
Zhiyuan Lv (6):
drm/i915: preallocate pdps f
I915 Broadwell guest driver is now supported to run inside a VM with
Intel GVT-g
v2:
- Introduce HAS_VGPU macro (Zhenyu Wang)
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_vgpu.c | 2 +-
drivers/gpu/drm/i915/i915_vgpu.h | 2 ++
2
ction gen8_preallocate_top_level_pdps() in the patch is from
Mika, with only one change to set "used_pdpes" to avoid duplicated
allocation later.
Cc: Mika Kuoppala
Cc: Dave Gordon
Cc: Michel Thierry
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915
write-protect the guest pages of PPGTT, and clear the write
protection when they end their life cycle.
v2:
- Use lower_32_bits()/upper_32_bits() for qword operations;
- Remove the notification of guest context creation/destroy;
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu
The full ppgtt is supported now in Intel GVT-g device model. Broadwell
is allowed to use it in virtual machines.
v2:
- Keep backward compatibility on HSW with old device model (daniel)
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915
virtual machines.
v2:
- Adjust the position of vgpu check in sanitize function (Joonas)
- Add vgpu error check in context initialization. (Joonas, Daniel)
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_gem_context.c | 7 +++
drivers/gpu/drm/i915/intel_lrc.c
ng storage address unchanged. If it is not
used, the device model will perform the context shadow work in the
context scheduling time.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_vgpu.h | 34 --
1 file c
Hi Daniel,
On Wed, Aug 26, 2015 at 10:50:23AM +0200, Daniel Vetter wrote:
> > > @@ -332,6 +332,12 @@ int i915_gem_context_init(struct drm_device
> > > *dev)
> > > if (WARN_ON(dev_priv->ring[RCS].default_context))
> > > return 0;
> > >
> > > + if (intel_vgpu_active(
Hi Danie,
On Wed, Aug 26, 2015 at 10:47:37AM +0200, Daniel Vetter wrote:
> On Thu, Aug 20, 2015 at 01:57:13PM +0300, Joonas Lahtinen wrote:
> > On to, 2015-08-20 at 15:45 +0800, Zhiyuan Lv wrote:
> > > The full ppgtt is supported in Intel GVT-g device model. So the
> &
Hi Daniel,
On Wed, Aug 26, 2015 at 10:56:00AM +0200, Daniel Vetter wrote:
> On Tue, Aug 25, 2015 at 08:17:05AM +0800, Zhiyuan Lv wrote:
> > Hi Chris,
> >
> > On Mon, Aug 24, 2015 at 11:23:13AM +0100, Chris Wilson wrote:
> > > On Mon, Aug 24, 2015 at 06:04:28PM +0800
015 at 03:01:26PM +0800, Zhiyuan Lv wrote:
> > That seems to be a typo. The original code will override the previous
> > list empty check value in the loop. As the result, only the last vm in
> > vm_list impacts the empty check. The problem is fixed by using local
> > bo
That seems to be a typo. The original code will override the previous
list empty check value in the loop. As the result, only the last vm in
vm_list impacts the empty check. The problem is fixed by using local
bool variable inside the loop.
Signed-off-by: Zhiyuan Lv
---
drivers/gpu/drm/i915
Hi Chris,
On Mon, Aug 24, 2015 at 11:23:13AM +0100, Chris Wilson wrote:
> On Mon, Aug 24, 2015 at 06:04:28PM +0800, Zhiyuan Lv wrote:
> > Hi Chris,
> >
> > On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> > > On Thu, Aug 20, 2015 at 03:4
Hi Chris,
On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > Intel GVT-g will perform EXECLIST context shadowing and ring buffer
> > shadowing. The shadow copy is created when guest creates a context.
&
ks in advance!
Regards,
-Zhiyuan
On Thu, Aug 20, 2015 at 05:16:54PM +0800, Zhiyuan Lv wrote:
> Hi Chris,
>
> On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> > On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > > Intel GVT-g will perform EXECLI
On Thu, Aug 20, 2015 at 04:11:57PM +0300, Joonas Lahtinen wrote:
> Hi,
>
> Notes below.
>
> On to, 2015-08-20 at 15:45 +0800, Zhiyuan Lv wrote:
> > When i915 drivers run inside a VM with Intel-GVTg, some explicit
> > notifications are needed from guest to host devic
On Thu, Aug 20, 2015 at 03:58:43PM +0300, Joonas Lahtinen wrote:
> On to, 2015-08-20 at 15:45 +0800, Zhiyuan Lv wrote:
> > Some more definitions in the PV info page are added. They are mainly
> > for the guest notification to Intel GVT-g device model. They are used
> > f
Hi Joonas,
Thanks for the review! And my reply inline.
Regards,
-Zhiyuan
On Thu, Aug 20, 2015 at 02:23:11PM +0300, Joonas Lahtinen wrote:
> Hi,
>
> On to, 2015-08-20 at 17:40 +0800, Zhiyuan Lv wrote:
> > On Thu, Aug 20, 2015 at 10:22:37AM +0100, Chris Wilson wrote:
> > &
On Thu, Aug 20, 2015 at 10:22:37AM +0100, Chris Wilson wrote:
> On Thu, Aug 20, 2015 at 04:55:08PM +0800, Zhiyuan Lv wrote:
> > Hi Chris,
> >
> > On Thu, Aug 20, 2015 at 09:34:05AM +0100, Chris Wilson wrote:
> > > On Thu, Aug 20, 2015 at 03:45:20PM +0800, Zhiyu
Hi Chris,
On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > Intel GVT-g will perform EXECLIST context shadowing and ring buffer
> > shadowing. The shadow copy is created when guest creates a context.
&
Hi Chris,
On Thu, Aug 20, 2015 at 09:34:05AM +0100, Chris Wilson wrote:
> On Thu, Aug 20, 2015 at 03:45:20PM +0800, Zhiyuan Lv wrote:
> > Broadwell hardware supports both ring buffer mode and execlist mode.
> > When i915 runs inside a VM with Intel GVT-g, we allow execlist mod
Hi Jani,
On Thu, Aug 20, 2015 at 09:44:08AM +0300, Jani Nikula wrote:
> On Thu, 20 Aug 2015, Zhiyuan Lv wrote:
> > I915 kernel driver can now work inside a virtual machine on Haswell
> > with Intel GVT-g. In order to do the same thing on Broadwell, there
> > are some extr
EXECLIST
context. Intel GVT-g needs to write-protect the guest pages of PPGTT
and contexts, and clear the write protection when they end their life
cycle.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +
drivers
easier.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/intel_lrc.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 39df304..4b2ac37 100644
--- a/drivers/gpu
I915 Broadwell guest driver is now supported to run inside a VM with
Intel GVT-g
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_vgpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915
. Consider that ring buffer mode is legacy
mode, it makes sense to drop it inside virtual machines.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/intel_lrc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915
Some more definitions in the PV info page are added. They are mainly
for the guest notification to Intel GVT-g device model. They are used
for Broadwell enabling.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_vgpu.h | 34 --
1
ction gen8_preallocate_top_level_pdps() in the patch is from
Mika, with only one change to set "used_pdpes" to avoid duplicated
allocation later.
Cc: Mika Kuoppala
Cc: Dave Gordon
Cc: Michel Thierry
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915
Mika's earlier one, but we use it for vgpu only.
The sixth patch is the implementation of the notification for
shadowing.
Zhiyuan Lv (7):
drm/i915: preallocate pdps for 32 bit vgpu
drm/i915: Enable full ppgtt for vgpu
drm/i915: Always enable execlists on BDW for vgpu
drm/i915: always pi
The full ppgtt is supported in Intel GVT-g device model. So the
restriction can be removed.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm
EXECLIST
context. Intel GVT-g needs to write-protect the guest pages of PPGTT
and contexts, and clear the write protection when they end their life
cycle.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +
drivers
I915 Broadwell guest driver is now supported to run inside a VM with
Intel GVT-g
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_vgpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915
Some more definitions in the PV info page are added. They are mainly
for the guest notification to Intel GVT-g device model. They are used
for Broadwell enabling.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_vgpu.h | 34 --
1
easier.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/intel_lrc.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 39df304..4b2ac37 100644
--- a/drivers/gpu
. Consider that ring buffer mode is legacy
mode, it makes sense to drop it inside virtual machines.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/intel_lrc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915
The full ppgtt is supported in Intel GVT-g device model. So the
restriction can be removed.
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm
ction gen8_preallocate_top_level_pdps() in the patch is from
Mika, with only one change to set "used_pdpes" to avoid duplicated
allocation later.
Cc: Mika Kuoppala
Cc: Dave Gordon
Cc: Michel Thierry
Signed-off-by: Zhiyuan Lv
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915
Mika's earlier one, but we use it for vgpu only.
The sixth patch is the implementation of the notification for
shadowing.
Zhiyuan Lv (7):
drm/i915: preallocate pdps for 32 bit vgpu
drm/i915: Enable full ppgtt for vgpu
drm/i915: Always enable execlists on BDW for vgpu
drm/i915: always pi
On Thu, Aug 13, 2015 at 01:03:30PM +0100, Dave Gordon wrote:
> On 13/08/15 12:42, Dave Gordon wrote:
> >On 13/08/15 11:12, Michel Thierry wrote:
> >>On 8/13/2015 5:08 PM, Zhiyuan Lv wrote:
> >>>Hi Michel,
> >>>
> >>>Thanks for the reply!
Hi Dave,
On Wed, Aug 12, 2015 at 04:09:18PM +0100, Dave Gordon wrote:
> On 12/08/15 08:56, Thierry, Michel wrote:
> >On 8/11/2015 1:05 PM, Zhiyuan Lv wrote:
> >>Hi Mika/Dave/Michel,
> >>
> >>I saw the patch of using LRI for root pointer update has been merge
Wed, Aug 12, 2015 at 03:56:49PM +0800, Michel Thierry wrote:
> On 8/11/2015 1:05 PM, Zhiyuan Lv wrote:
> >Hi Mika/Dave/Michel,
> >
> >I saw the patch of using LRI for root pointer update has been merged to
> >drm-intel. When we consider i915 driver to run inside a virtual
Hi Mika/Dave/Michel,
I saw the patch of using LRI for root pointer update has been merged to
drm-intel. When we consider i915 driver to run inside a virtual machine, e.g.
with XenGT, we may still need Mika's this patch like below:
"
if (intel_vgpu_active(ppgtt->base.dev))
Hi Daniel,
On Mon, Sep 29, 2014 at 02:30:09PM +0200, Daniel Vetter wrote:
> On Mon, Sep 29, 2014 at 02:31:17PM +0800, Zhiyuan Lv wrote:
> > Hi Daniel,
> >
> > On Fri, Sep 19, 2014 at 06:09:37PM +0200, Daniel Vetter wrote:
> > > On Sat, Sep 20, 2014 at 02:
buffer in the host side
> >
> > Signed-off-by: Yu Zhang
> > Signed-off-by: Jike Song
> > Signed-off-by: Zhiyuan Lv
> > ---
> > drivers/gpu/drm/i915/i915_dma.c | 8
> > drivers/gpu/drm/i915/i915_reg.h | 7 +++
> > drivers/gpu/drm/i
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