DRAM information from pcode")
Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
After removing the check of memory frequency, the EHL SBL can work as
expected. Otherwise it will fail some checks in intel_dram_detect
because of incorrect memory frequency calculation.
Add: Tested-by:
On 2018年10月11日 14:14, Xiaolin Zhang wrote:
This patch handles ppgtt update from g2v notification.
It read out ppgtt pte entries from guest pte tables page and
convert them to host pfns.
It creates local ppgtt tables and insert the content pages
into the local ppgtt tables directly, which does
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Tuesday, July 3, 2018 10:08 PM
>To: Zhao, Yakui ; Daniel Vetter
>Cc: intel-gfx@lists.freedesktop.org
>Subject: RE: [Intel-gfx] [PATCH v2 2/2] drm/i915: write fence reg only once on
>
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Tuesday, July 3, 2018 9:25 PM
>To: Zhao, Yakui ; Daniel Vetter
>Cc: intel-gfx@lists.freedesktop.org
>Subject: RE: [Intel-gfx] [PATCH v2 2/2] drm/i915: write fence reg only once on
>VGPU
&
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index d548ac0..7b10bf9 100644
--- a/drivers/gpu/dr
>-Original Message-
>From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
>Sent: Tuesday, July 3, 2018 5:52 PM
>To: Chris Wilson
>Cc: Daniel Vetter ; Zhao, Yakui ;
>intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH v2 2/2]
>-Original Message-
>From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
>Sent: Tuesday, July 3, 2018 4:51 PM
>To: Zhao, Yakui
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: write fence reg only once
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Tuesday, July 3, 2018 5:01 PM
>To: Daniel Vetter ; Zhao, Yakui
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Use 64-bit to Read/Write
>fence r
one typo error of parameter when calling intel_vgpu_active
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
b/drivers/gpu/drm/i915/i915_gem_fence_re
V1->V2: Fix one typo error.
Zhao Yakui (2):
drm/i915: Use 64-bit to Read/Write fence reg on SNB+
drm/i915: write fence reg only once on VGPU
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
--
2.
Based on HW spec the fence reg on SNB+ is defined as 64-bit. Just follow
the b-spec to use 64-bit read/write mode.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
>-Original Message-
>From: Zhao, Yakui
>Sent: Tuesday, July 3, 2018 10:22 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: zhen...@linux.intel.com; Zhao, Yakui
>Subject: [PATCH 2/2] drm/i915: write fence reg only once on VGPU
>
>On VGPU scenario the read/write operat
: Zhao Yakui
---
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index d92fe03..55bf6d9 100644
--- a/drivers/gpu/drm/i915
Zhao Yakui (2):
drm/i915: Use 64-bit to Read/Write fence reg on SNB+
drm/i915: write fence reg only once on VGPU
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
--
2.7.4
Based on HW spec the fence reg on SNB+ is defined as 64-bit. Just follow
the b-spec to use 64-bit read/write mode.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Friday, June 22, 2018 3:37 PM
>To: Zhao, Yakui ; intel-gfx@lists.freedesktop.org
>Subject: RE: [PATCH V2] drm/i915: Use I915_MAP_WC for execlists context
>buffer on the platforms without L
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Friday, June 22, 2018 2:26 PM
>To: Zhao, Yakui ; intel-gfx@lists.freedesktop.org
>Cc: Zhao, Yakui
>Subject: Re: [PATCH V2] drm/i915: Use I915_MAP_WC for execlists context
>buffer on
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Friday, June 22, 2018 2:36 PM
>To: Zhao, Yakui ; intel-gfx@lists.freedesktop.org
>Cc: Zhao, Yakui
>Subject: Re: [PATCH V2] drm/i915: Use I915_MAP_WC for execlists context
>buffer on
writen into phys page directly. It will
be safer.
V1->V2: Remove the dirty flag of execlists state buffer and one minor
typo in commit log
Signed-off-by: Zhao Yakui
CC: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
d
writen into phys page directly. It will
be safer.
Signed-off-by: Zhao Yakui
CC: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 10deebe
On 07/13/2016 06:04 PM, Deak, Imre wrote:
Hi Yakui,
thanks for taking a look at these, see my comment below.
On ke, 2016-07-13 at 10:22 +0800, Zhao Yakui wrote:
On 07/01/2016 09:40 PM, Deak, Imre wrote:
The purpose for each MOCS entry isn't well defined atm. Defining these
is importa
LC, setting the WB-policy will add the extra
overhead. In such case the patch looks more reasonable for BXT.
Add: Acked-by: Zhao Yakui
---
drivers/gpu/drm/i915/intel_mocs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_mocs.c
b/drive
On 07/01/2016 09:40 PM, Deak, Imre wrote:
The purpose for each MOCS entry isn't well defined atm. Defining these
is important to remove any uncertainty about the use of these entries
for example in terms of performance and GPU/CPU coherency.
Suggested by Ville.
CC: Rong R Yang
CC: Yakui Zhao
CC
cleaning up.
Add: Acked-by: Zhao Yakui
Thanks
Yakui
---
drivers/gpu/drm/i915/intel_mocs.c | 88 +++
1 file changed, 61 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_mocs.c
b/drivers/gpu/drm/i915/intel_mocs.c
index 3c1482b..d36e609
On Wed, 2014-12-10 at 08:55 -0700, Dave Gordon wrote:
> On 10/12/14 09:11, Daniel Vetter wrote:
> > On Wed, Dec 10, 2014 at 02:18:15AM +, Gong, Zhipeng wrote:
> >> On Tue, 2014-12-09 at 10:46 +0100, Daniel Vetter wrote:
> >>> On Mon, Dec 08, 2014 at 01:55:56PM -0800, Rodrigo Vivi wrote:
>
> [s
already fixed on Broadwell)
Signed-off-by: Zhao Yakui
---
lib/rendercopy_gen9.c | 4
1 file changed, 4 deletions(-)
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 9ff4b3a..e20a84f 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -397,7 +397,6 @@ static void
is already fixed on Broadwell)
Signed-off-by: Zhao Yakui
---
lib/media_fill_gen9.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/lib/media_fill_gen9.c b/lib/media_fill_gen9.c
index 6c6ba89..3fd2181 100644
--- a/lib/media_fill_gen9.c
+++ b/lib/media_fill_gen9.c
@@ -205,12 +205,10
On Tue, 2014-08-05 at 02:44 -0600, Daniel Vetter wrote:
> On Tue, Aug 05, 2014 at 03:54:04PM +0800, Zhipeng Gong wrote:
> > On Broadwell GT3 we have 2 Video Command Streamers (VCS), but userspace
> > has no control when using VCS1 or VCS2. This patch introduces a mechanism
> > to avoid the default
can determine which ring is used
to dispatch command at runtime.
> Haihao, what do you think?
>
> With debugfs would be something like i195_dual_bsd_ring file with 3 options:
> all bsd1 bsd2
>
> Thanks,
> Rodrigo.
>
> -Original Message-
> From: Zhao, Y
On Mon, 2014-06-30 at 10:51 -0600, Rodrigo Vivi wrote:
> On Broadwell GT3 we have 2 Video Command Streamers (VCS),
> but userspace has no control when using VCS1 or VCS2. So we cannot test,
> validate or debug specific changes or workaround that might affect only
> one or another ring. So this patc
On Mon, 2014-05-12 at 13:04 -0600, Daniel Vetter wrote:
> On Fri, May 09, 2014 at 01:44:59PM +0100, oscar.ma...@intel.com wrote:
> > From: Oscar Mateo
> >
> > This is missing in:
> >
> > commit 78325f2d270897c9ee0887125b7abb963eb8efea
> > Author: Ben Widawsky
> > Date: Tue Apr 29 14:52:29 201
On Tue, 2014-04-22 at 13:52 -0600, Daniel Vetter wrote:
> On Thu, Apr 17, 2014 at 10:37:37AM +0800, Zhao Yakui wrote:
> > Based on the hardware spec, the BDW GT3 machine has two independent
> > BSD ring that can be used to dispatch the video commands.
> > So just initializ
On Thu, 2014-04-24 at 09:21 -0600, Daniel Vetter wrote:
> On Thu, Apr 17, 2014 at 10:37:37AM +0800, Zhao Yakui wrote:
> > Based on the hardware spec, the BDW GT3 machine has two independent
> > BSD ring that can be used to dispatch the video commands.
> > So just initializ
On Thu, 2014-04-24 at 01:18 -0600, Daniel Vetter wrote:
> On Thu, Apr 24, 2014 at 8:43 AM, Zhao Yakui wrote:
> > On Wed, 2014-04-23 at 12:32 -0600, Daniel Vetter wrote:
> >> This fills all the gaps we've had in our execbuf testing. Overflow
> >> testing of the v
On Wed, 2014-04-23 at 12:32 -0600, Daniel Vetter wrote:
> This fills all the gaps we've had in our execbuf testing. Overflow
> testing of the various arrays is already done by gem_reloc_overflow.
>
> Also add kms_flip_tiling to .gitignore.
>
> This will cause a bunch of failures since current ker
#x27;s comment to add one subtext instead of one individual
test case, which is used to test the CPU<->GPU sync under multi BSD rings/
V2->V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert
V3->V4: Add gem_multi_bsd_sync_loop.
case, which is used to test the CPU<->GPU sync under multi BSD rings.
V2->V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
tests/g
;V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert.
V3->V4: Add gem_multi_bsd_sync_loop.c into the tests/.gitignore
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
tests/.gitignore|1 +
tests/Makef
On Wed, 2014-04-23 at 20:02 -0600, Zhao, Yakui wrote:
It seems that the patch 01 is filter out.
So I will try to resend it again.
Thanks.
Yakui
> This follows Daniel's advice to add the two test cases based on multi drm_fd
> to
> test the ring sync and CPU<->GPU sync.
case, which is used to test the CPU<->GPU sync under multi BSD rings.
V2->V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
tests/g
#x27;s comment to add one subtext instead of one individual
test case, which is used to test the CPU<->GPU sync under multi BSD rings/
V2->V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert
Zhao Yakui (2):
tests: Add one ring
#x27;s comment to add one subtext instead of one individual
test case, which is used to test the CPU<->GPU sync under multi BSD rings/
V2->V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert
Zhao Yakui (2):
tests: Add one ring
case, which is used to test the CPU<->GPU sync under multi BSD rings.
V2->V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
tests/g
;V3: Follow Imre's comment to remove the unnecessary initialization and
use igt_assert_f instead of igt_assert.
Signed-off-by: Zhao Yakui
---
tests/Makefile.sources |1 +
tests/gem_multi_bsd_sync_loop.c | 175 +++
2 files changed, 176 in
On Tue, 2014-04-22 at 13:44 -0600, Daniel Vetter wrote:
> On Tue, Apr 22, 2014 at 02:52:04PM +0300, Imre Deak wrote:
> > On Tue, 2014-04-15 at 10:38 +0800, Zhao Yakui wrote:
> > > The Broadwell GT3 machine has two independent BSD rings in kernel driver
> > > while
>
On Tue, 2014-04-22 at 13:48 -0600, Daniel Vetter wrote:
> On Tue, Apr 22, 2014 at 03:05:03PM +0300, Imre Deak wrote:
> > On Tue, 2014-04-15 at 10:38 +0800, Zhao Yakui wrote:
> > > The Broadwell GT3 machine has two independent BSD rings in kernel driver
> > > while
>
The Gen7 doesn't have the second BSD ring. But it will complain the switch check
warning message during compilation. So just add it to remove the
switch check warning.
V1->V2: Follow Daniel's comment to update the comment
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
dr
r BDW
in kernel/early-quirks.c
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c | 26 --
include/drm/i915_pciids.h | 22 +-
2 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/
iewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c |4 +-
drivers/gpu/drm/i915/i915_drv.h |2 +
drivers/gpu/drm/i915/i915_gem.c |9 +++-
drivers/gpu/drm/i915/i915_gpu_error.c |1 +
drivers/gpu/drm/i915/i915_reg.h
mmand.
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_dma.c|3 +++
drivers/gpu/drm/i915/i915_drv.h|3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 40 +++-
3 files changed, 45 insertions(+), 1 deletion(
Reviewed-by: Imre Deak
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_irq.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7a4d3ae..63bd5de 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
Signed-off-by: Zhao Yakui
Reviewed-by: Imre Deak
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c |2 +-
drivers/gpu/drm/i915/intel_ringbuffer.h|1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915
te
the ring name for the second bsd ring.
Zhao Yakui (6):
drm/i915: Split the BDW device definition to prepare for dual BSD
rings on BDW GT3
drm/i915: Update the restrict check to filter out wrong Ring ID
passed by user-space
drm/i915:Initialize the second BSD ring on BDW GT3 machine
On Wed, 2014-04-16 at 10:23 -0600, Deak, Imre wrote:
> On Wed, 2014-04-16 at 10:41 +0800, Zhao Yakui wrote:
> > Based on the hardware spec, the BDW GT3 machine has two independent
> > BSD ring that can be used to dispatch the video commands.
> > So just initialize it.
> &g
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_irq.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7a4d3ae..63bd5de 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm
Based on the hardware spec, the BDW GT3 machine has two independent
BSD ring that can be used to dispatch the video commands.
So just initialize it.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c |4 +--
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu
The Gen7 doesn't have the second BSD ring. But it will complain the switch check
warning message during compilation. So just add it to remove the
switch check warning.
V1->V2: Follow Daniel's comment to update the comment
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/intel
and.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_dma.c|3 +++
drivers/gpu/drm/i915/i915_drv.h|3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 40 +++-
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/driv
One extra ring is added in the kernel driver but it is transparent to the
user-space application/middleware. In such case the number of the rings
in kernel driver is bigger than that exported to the user-space. So
it needs to filter out the wrong Ring ID passed by user-space.
Signed-off-by: Zhao
x27;s comment to use the struct_mutext instead of
atomic_t during determining which ring can be used to dispatch Video command.
Zhao Yakui (6):
drm/i915: Split the BDW device definition to prepare for dual BSD
rings on BDW GT3
drm/i915:Initialize the second BSD ring on BDW GT3 machine
drm
r BDW
in kernel/early-quirks.c
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c | 26 --
include/drm/i915_pciids.h | 22 +-
2 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers
x27;s comment to use the struct_mutext instead of
atomic_t during determining which ring can be used to dispatch Video command.
Zhao Yakui (6):
drm/i915: Split the BDW device definition to prepare for dual BSD
rings on BDW GT3
drm/i915:Initialize the second BSD ring on BDW GT3 machine
drm
The Gen7 doesn't have the second BSD ring. But it will complain the switch check
warning message during compilation. So just add it to remove the
switch check warning.
V1->V2: Follow Daniel's comment to update the comment
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/intel
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_irq.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7a4d3ae..63bd5de 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm
Based on the hardware spec, the BDW GT3 machine has two independent
BSD ring that can be used to dispatch the video commands.
So just initialize it.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c |4 +--
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu
r BDW
in kernel/early-quirks.c
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c | 26 --
include/drm/i915_pciids.h | 22 +-
2 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers
and.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_dma.c|3 +++
drivers/gpu/drm/i915/i915_drv.h|3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 40 +++-
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/driv
One extra ring is added in the kernel driver but it is transparent to the
user-space application/middleware. In such case the number of the rings
in kernel driver is bigger than that exported to the user-space. So
it needs to filter out the wrong Ring ID passed by user-space.
Signed-off-by: Zhao
-off-by: Zhao Yakui
---
tests/Makefile.sources |1 +
tests/gem_multi_bsd_sync_loop.c | 172 +++
2 files changed, 173 insertions(+)
create mode 100644 tests/gem_multi_bsd_sync_loop.c
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
case, which is used to test the CPU<->GPU sync under multi BSD rings
Signed-off-by: Zhao Yakui
---
tests/gem_dummy_reloc_loop.c | 102 +-
1 file changed, 101 insertions(+), 1 deletion(-)
diff --git a/tests/gem_dummy_reloc_loop.c b/tests/gem_dumm
#x27;s comment to add one subtext instead of one individual
test case, which is used to test the CPU<->GPU sync under multi BSD rings/
Zhao Yakui (2):
tests: Add one ring sync case based on multi drm_fd to test ring
semaphore sync under multi BSD rings
tests/gem_dummy_reloc_loop: Add one s
On Mon, 2014-04-14 at 02:19 -0600, Chris Wilson wrote:
> On Mon, Apr 14, 2014 at 04:05:19PM +0800, Zhao Yakui wrote:
> > On Mon, 2014-04-14 at 01:22 -0600, Daniel Vetter wrote:
> > > You're still using atomic_t for no real good reason.
> > > gen8_dispatch_bsd_ri
On Mon, 2014-04-14 at 01:55 -0600, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 9:32 AM, Zhao Yakui wrote:
> > BTW: How do I update the .gitigonre?
> > In my test I usually use the following step to create the corresponding
> > patches before sending and never update the .
On Mon, 2014-04-14 at 01:22 -0600, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 12:21:44PM +0800, Zhao Yakui wrote:
> > V1->V2: Follow Daniel's comment and use the simple ping-pong mechanism.
> > This is only to add the support of dual BSD rings on BDW GT3 machine.
>
On Mon, 2014-04-14 at 01:06 -0600, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 12:19:58PM +0800, Zhao Yakui wrote:
> > The Broadwell GT3 machine has two independent BSD rings in kernel driver
> > while
> > it is transparent to the user-space driver. In such case it needs
On Mon, 2014-04-14 at 01:06 -0600, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 12:19:58PM +0800, Zhao Yakui wrote:
> > The Broadwell GT3 machine has two independent BSD rings in kernel driver
> > while
> > it is transparent to the user-space driver. In such case it needs
On Mon, 2014-04-14 at 01:09 -0600, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 12:21:39PM +0800, Zhao Yakui wrote:
> > V1->V2: Follow Daniel's comment to consider the stolen check for BDW in
> > kernel/early-quirks.c
>
> Small style nit: We usually put the patc
am while encoding
another video stream. The coarse ping-pong mechanism is used to determine
which BSD ring is used to dispatch the BSD video command.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_dma.c|3 +++
drivers/gpu/drm/i915/i915_drv.h|3 +++
drivers
uch case the kernel driver will decide
which ring is to dispatch the BSD video command.
As every BSD ring is powerful, it is enough to dispatch the BSD video command
based on the drm fd. In such case the different BSD ring is used for video
playing
back and encoding.
Zhao Yakui (6):
drm/i91
One extra ring is added in the kernel driver but it is transparent to the
user-space application/middleware. In such case the number of the rings
in kernel driver is bigger than that exported to the user-space. So
it needs to filter out the wrong Ring ID passed by user-space.
Signed-off-by: Zhao
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_irq.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7a4d3ae..63bd5de 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm
Based on the hardware spec, the BDW GT3 machine has two independent
BSD ring that can be used to dispatch the video commands.
So just initialize it.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c |4 +--
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu
V1->V2: Follow Daniel's comment to update the comment
The Gen7 doesn't have the second BSD ring. But it will complain the switch check
warning message during compilation. So just add it to remove the
switch check warning.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/intel
s on BDW GT3 machine.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c | 26 --
include/drm/i915_pciids.h | 22 +-
2 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/
ommand.
Signed-off-by: Zhao Yakui
---
tests/Makefile.sources|1 +
tests/gem_dummy_reloc_multi_bsd.c | 258 +
2 files changed, 259 insertions(+)
create mode 100644 tests/gem_dummy_reloc_multi_bsd.c
diff --git a/tests/Makefile.sources b
drm_fd can
assure that the second BSD ring has the opportunity to dispatch the GPU
command.
Signed-off-by: Zhao Yakui
---
tests/Makefile.sources |1 +
tests/gem_multi_bsd_sync_loop.c | 172 +++
2 files changed, 173 insertions(+)
create mode
user-space. But we still need to check the ring sync and CPU<->GPU sync
for
the second BSD ring. Two tests are created based on the multi drm_fds to
test the sync. Multi drm_fd can assure that the second BSD ring has the
opportunity
to dispatch the GPU command.
Zhao Yakui (2):
tests: Add o
On Fri, 2014-04-11 at 02:57 -0600, Daniel Vetter wrote:
> On Fri, Apr 11, 2014 at 08:56:28AM +0800, Zhao Yakui wrote:
> > On Thu, 2014-04-10 at 03:04 -0600, Daniel Vetter wrote:
> > > On Thu, Apr 10, 2014 at 04:28:34PM +0800, Zhao Yakui wrote:
> > > > BTW: Does
On Thu, 2014-04-10 at 03:04 -0600, Daniel Vetter wrote:
> On Thu, Apr 10, 2014 at 04:28:34PM +0800, Zhao Yakui wrote:
> > BTW: Does it need to check all the flags defined in i915_drm.h or the
> > exported flag returned by i915_get_parameter?
>
> I don't have i915_ge
On Thu, 2014-04-10 at 03:03 -0600, Daniel Vetter wrote:
> On Thu, Apr 10, 2014 at 04:04:22PM +0800, Zhao Yakui wrote:
> > On Thu, 2014-04-10 at 00:48 -0600, Daniel Vetter wrote:
> > > On Thu, Apr 10, 2014 at 10:24:53AM +0800, Zhao Yakui wrote:
> > > > On Wed, 201
On Thu, 2014-04-10 at 00:58 -0600, Daniel Vetter wrote:
> On Thu, Apr 10, 2014 at 11:28:46AM +0800, Zhao Yakui wrote:
> > On Wed, 2014-04-09 at 08:45 -0600, Daniel Vetter wrote:
> > > On Wed, Apr 09, 2014 at 09:59:51AM +0800, Zhao Yakui wrote:
> > > >
> > >
On Thu, 2014-04-10 at 00:48 -0600, Daniel Vetter wrote:
> On Thu, Apr 10, 2014 at 10:24:53AM +0800, Zhao Yakui wrote:
> > On Wed, 2014-04-09 at 08:34 -0600, Daniel Vetter wrote:
> > > On Wed, Apr 09, 2014 at 09:59:56AM +0800, Zhao Yakui wrote:
> > > > The BDW GT3
On Wed, 2014-04-09 at 08:45 -0600, Daniel Vetter wrote:
> On Wed, Apr 09, 2014 at 09:59:51AM +0800, Zhao Yakui wrote:
> >
> > This is the patch set that tries to add the support of dual BSD rings on BDW
> > GT3. Based on hardware spec, the BDW GT3 has two independent BSD ring
On Wed, 2014-04-09 at 08:34 -0600, Daniel Vetter wrote:
> On Wed, Apr 09, 2014 at 09:59:56AM +0800, Zhao Yakui wrote:
> > The BDW GT3 has two independent BSD rings, which can be used to process the
> > video commands. To be simpler, it is transparent to user-space
> &
On Wed, 2014-04-09 at 08:29 -0600, Daniel Vetter wrote:
> On Wed, Apr 09, 2014 at 09:59:55AM +0800, Zhao Yakui wrote:
> > The Gen7 doesn't have the second BSD ring. But it will complain the switch
> > check
> > warning message during compilation. So just add it to r
On Wed, 2014-04-09 at 08:27 -0600, Daniel Vetter wrote:
> On Wed, Apr 09, 2014 at 09:59:52AM +0800, Zhao Yakui wrote:
> > Based on the hardware spec, the BDW GT3 has the different configuration
> > with the BDW GT1/GT2. So split the BDW device info definition.
> > This is to d
Based on the hardware spec, the BDW GT3 has the different configuration
with the BDW GT1/GT2. So split the BDW device info definition.
This is to do the preparation for adding the Dual BSD rings on BDW GT3 machine.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_drv.c | 24
The Gen7 doesn't have the second BSD ring. But it will complain the switch check
warning message during compilation. So just add it to remove the
switch check warning.
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/intel_ringbuffer.c |1 +
1 file changed, 1 insertion(+)
diff --
avoid
the object synchronization between the BSD rings.
Zhao Yakui (5):
drm/i915: Split the BDW device definition to prepare for dual BSD
rings on BDW GT3
drm/i915: Initialize the second BSD ring on BDW GT3 machine
drm/i915: Handle the irq interrupt for the second BSD ring
drm/i915
Signed-off-by: Zhao Yakui
---
drivers/gpu/drm/i915/i915_irq.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index bdda3b5..d5b1dd3 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm
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