Sorry, I added a debug patch when submitting to trybot and forgot to
remove that from my local branch. I will resubmit to a new series.
Yunwei
On 4/23/2018 12:55 PM, Rodrigo Vivi wrote:
On Mon, Apr 23, 2018 at 09:12:46AM -0700, Yunwei Zhang wrote:
L3Bank could be fused off in hardware for de
On 4/16/2018 3:09 PM, Oscar Mateo wrote:
On 04/16/2018 02:22 PM, Yunwei Zhang wrote:
WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any
MMIO
read into Slice/Subslice specific registers, MCR packet control
register(0xFDC) needs to be programmed to point to any enabled
slic
Hi All,
I see the latest BAT test failed but the only thing I changed in this
new patchset is comment. It should be false alarm, not sure if this is
halting the further review. Please see if the code needs more change.
Thanks,
Yunwei
On 3/29/2018 8:44 AM, Yunwei Zhang wrote:
WaProgramMgsr
On 3/28/2018 2:39 AM, Tvrtko Ursulin wrote:
On 27/03/2018 23:14, Yunwei Zhang wrote:
L3Bank could be fused off in hardware for debug purpose, and it
is possible that subslice is enabled while its corresponding L3Bank
pairs
are disabled. In such case, if MCR packet control register(0xFDC) is
On 3/28/2018 9:03 AM, Chris Wilson wrote:
Quoting Zhang, Yunwei (2018-03-28 16:54:26)
On 3/27/2018 4:13 PM, Chris Wilson wrote:
Quoting Zhang, Yunwei (2018-03-27 23:49:27)
On 3/27/2018 3:27 PM, Chris Wilson wrote:
Quoting Yunwei Zhang (2018-03-27 23:14:16
On 3/27/2018 4:13 PM, Chris Wilson wrote:
Quoting Zhang, Yunwei (2018-03-27 23:49:27)
On 3/27/2018 3:27 PM, Chris Wilson wrote:
Quoting Yunwei Zhang (2018-03-27 23:14:16)
WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO
read into Slice/Subslice specific registers
On 3/27/2018 3:27 PM, Chris Wilson wrote:
Quoting Yunwei Zhang (2018-03-27 23:14:16)
WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO
read into Slice/Subslice specific registers, MCR packet control
register(0xFDC) needs to be programmed to point to any enabled
slice/s
On 3/26/2018 9:57 AM, Tvrtko Ursulin wrote:
On 26/03/2018 17:12, Yunwei Zhang wrote:
WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any
MMIO
read into Slice/Subslice specific registers, MCR packet control
register(0xFDC) needs to be programmed to point to any enabled
slice
