[v5 24/24] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v5 23/24] drm/i915/color: Create color pipeline with multisegmented LUT

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v5 22/24] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. v2: Set bit to enable multisegmented lut Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../gpu/drm/i915/display/skl_universal_plane.c | 17 + 1 file changed, 17 insertions

[v5 21/24] drm/i915/xelpd: Program Plane Post CSC Registers

From: Chaitanya Kumar Borah Extract the LUT and program plane post csc registers. v2: Add DSB support v3: Add support for single segment 1D LUT Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 123 + 1 file

[v5 20/24] drm/i915/color: Program Pre-CSC registers

From: Chaitanya Kumar Borah Add callback for programming Pre-CSC LUT for TGL and beyond v2: Add DSB support v3: Add support for single segment 1D LUT color op Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 104

[v5 19/24] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers v2: Add Plane Post CSC Gamma Multi Segment Enable bit Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 74 +++ 1 file changed, 74 insertions(+) diff --git a

[v5 18/24] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. v2: Add dsb support Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 16 .../gpu/drm/i915/display/intel_display_types.h | 2 +-

[v5 17/24] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v5 16/24] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond v2: - Add dsb support - Pass plane_state as we are now doing a uapi to hw state copy - Add support for 3x4 matrix Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 96

[v5 15/24] drm/i915/color: Preserve sign bit when int_bits is Zero

Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 9684eee96ef9..dcf7cfa722ef 100644 --- a/drivers/gpu/drm/i915/display

[v5 14/24] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v5 13/24] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. v2: adapt to struct intel_display v3: add dsb support Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 10 +- 1 file changed, 9

[v5 11/24] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v5 12/24] drm/i915/color: Add framework to program CSC

From: Chaitanya Kumar Borah Add framework to program CSC. It enables copying of matrix from uapi to intel plane state. Also adding helper functions which will eventually program values to hardware. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915

[v5 10/24] drm/i915/color: Create a transfer function color pipeline

iteration Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 49 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 52 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v5 09/24] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v5 08/24] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v5 07/24] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v5 06/24] drm: Add helper to extract lut from struct drm_color_lut_32

From: Chaitanya Kumar Borah Add helper to extract lut values in the precision needed by hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/drm/drm_color_mgmt.h | 16 1 file changed, 16 insertions(+) diff --git a/include/drm

[v5 05/24] drm: Define helper to initialize segmented 1D LUT

space to drm_plane_* Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 68 +++ include/drm/drm_colorop.h | 4 +++ 2 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm

[v5 04/24] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. v2: Fixed the documentation for Multi segmented lut (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c

[v5 03/24] drm: Add Color ops capability property

ion for hw_caps blob (Dmitry) Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include/drm/drm_colorop.h | 17 + 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/

[v5 02/24] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v5 00/24] Plane Color Pipeline support for Intel platforms

[NOT FOR REVIEW] drm: AMD series squashed Uma Shankar (7): drm: Add Color lut range attributes drm: Add Color ops capability property drm: Define helper to initialize segmented 1D LUT drm/i915/color: Add plane CTM callback for D13 and beyond drm/i915: Add register definitions for Pla

[PATCH] drm/i915/display: Fix RGB limited range handling for DP

CTS issue wrt colorimetry. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_dp.c | 21 +++-- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f48912f308df

[v4 12/23] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v4 03/23] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v4 02/23] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. v2: Updated the documentation for 3x3 CTM colorop (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm

[v4 07/23] drm: Define helper to initialize segmented 1D LUT

: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 68 +++ include/drm/drm_colorop.h | 4 +++ 2 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 7aa572f74193

[v4 15/23] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v4 16/23] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v4 23/23] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v4 10/23] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v4 22/23] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v4 21/23] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v4 19/23] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v4 20/23] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v4 18/23] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v4 17/23] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v4 08/23] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v4 14/23] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++- 2 files

[v4 13/23] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v4 00/23] Plane Color Pipeline support for Intel platforms

drm/i915/color: Add framework to program PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): drm: color pipeline base work Uma Shankar (10): drm: Add Enhanced LUT precision structure drm: Add Color lut range attributes drm: Add Color ops capability prop

[v4 11/23] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v4 09/23] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v4 06/23] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. v2: Fixed the documentation for Multi segmented lut (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c

[v4 05/23] drm: Add Color ops capability property

ion for hw_caps blob (Dmitry) Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include/drm/drm_colorop.h | 17 + 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/

[v4 04/23] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v3 09/23] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v3 23/23] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v3 19/23] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v3 22/23] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v3 17/23] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v3 21/23] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v3 20/23] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v3 18/23] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v3 16/23] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v3 15/23] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v3 14/23] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++- 2 files

[v3 12/23] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v3 13/23] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v3 06/23] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. v2: Fixed the documentation for Multi segmented lut (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c

[v3 11/23] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v3 08/23] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v3 10/23] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v3 07/23] drm: Define helper to initialize segmented 1D LUT

: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 68 +++ include/drm/drm_colorop.h | 4 +++ 2 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 7aa572f74193

[v3 00/23] Plane Color Pipeline support for Intel platforms

m PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): drm: color pipeline base work Uma Shankar (10): drm: Add Enhanced LUT precision structure drm: Add Color lut range attributes drm: Add Color ops capability property drm: Define helper to initialize segmen

[v3 03/23] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v3 05/23] drm: Add Color ops capability property

ion for hw_caps blob (Dmitry) Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include/drm/drm_colorop.h | 17 + 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/

[v3 04/23] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v3 02/23] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. v2: Updated the documentation for 3x3 CTM colorop (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm

[v2 09/25] drm: Add helper to initialize segmented 1D LUT

From: Chaitanya Kumar Borah Add helper to initialize 1D segmented LUT Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 27 ++- include/drm/drm_colorop.h | 4 2 files changed, 30 insertions(+), 1 deletion

[v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v2 24/25] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v2 22/25] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v2 21/25] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v2 19/25] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v2 17/25] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v2 16/25] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files

[v2 15/25] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v2 13/25] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v2 07/25] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 4 drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include

[v2 12/25] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v2 02/25] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 29

[v2 11/25] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v2 10/25] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG

This adds helper functions to create 1D multi-segmented Lut color block capabilities. It exposes the hardware block as segments which are converted to blob and passed in the property. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 24

[v2 03/25] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v2 05/25] drm: Add Color ops capability property

Add capability property which a colorop can expose it's hardware's abilities. It's a blob property that can be filled with respective data structures depending on the colorop. The user space is expected to read this property and program the colorop accordingly. Signed-off-by: Uma

[v2 06/25] drm: Define helper to create color ops capability property

Add a helper to create capability property for a colorop Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_colorop.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c

[v2 04/25] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v2 00/25] Plane Color Pipeline support for Intel platforms

ork to set colorop drm/i915/color: Add callbacks to set plane CTM drm/i915/color: Add new color callbacks for Xelpd drm/i915/color: Add framework to program PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): [NOT FOR REVIEW] drm: color pipeline base work Uma S

[v4] drm/xe/fbdev: Limit the usage of stolen for LNL+

as De Marchi Signed-off-by: Uma Shankar --- drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 6 +- drivers/gpu/drm/xe/display/xe_plane_initial.c | 6 ++ drivers/gpu/drm/xe/xe_wa_oob.rules| 1 + 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/di

[v3] drm/xe/fbdev: Limit the usage of stolen for LNL+

umber, limited WA to LNL and Adopted XE_WA framework as suggested by Lucas and Matt. v3: Introduced the waxxx_display to avoid tipping on other WA. Used xe_root_mmio_gt and avoid the for loop. (Suggested by Lucas) Signed-off-by: Uma Shankar --- drivers/gpu/drm/xe/display/intel_fbdev

[v2] drm/xe/fbdev: Limit the usage of stolen for LNL+

umber, limited WA to LNL and Adopted XE_WA framework as suggested by Lucas and Matt. Signed-off-by: Uma Shankar --- drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 20 ++- drivers/gpu/drm/xe/display/xe_plane_initial.c | 12 +++ drivers/gpu/drm/xe/xe_wa_oob.

[PATCH] drm/xe/fbdev: Limit the usage of stolen for LNL+

d-off-by: Uma Shankar --- drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 10 +- drivers/gpu/drm/xe/display/xe_plane_initial.c | 10 ++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c b/drivers/gpu/drm/xe/di

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