From: "A.Sunil Kamath"
Better to use num_scaler itself while printing scaler_info.
This fixes a bug of printing information for the missing
second scaler on pipe C for SKL platform.
Signed-off-by: A.Sunil Kamath
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1
On Thursday 29 October 2015 07:25 PM, Imre Deak wrote:
On to, 2015-10-29 at 15:48 +0530, Sunil Kamath wrote:
On Thursday 29 October 2015 03:28 AM, Imre Deak wrote:
From: Animesh Manna
Skl is fully dependent on dmc for going to low power state (dc5/dc6).
This requires a trigger from rpm. To
reference if firmware loading is
not completed.
So moved the intel_csr_ucode_init call after runtime pm enable.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
[imre: moved the call right after power domain init to avoid race with
the
: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 23a3aa3
properly.
v1: Initial version.
v2: Based on review comment from Daniel added code commnent.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-bt: Vathsala Nagaraju
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/i915
Daniel,
- created a seperate patch for csr uninitialization set call.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/i915/i915_drv.c | 13
On Wednesday 26 August 2015 01:36 AM, Animesh Manna wrote:
This patch remove the function call to set the firmware
loading status as uninitialized during suspend.
Dmc firmware will restore the firmware in normal suspend. In previous
patch added a check to directly read the hardware status and lo
debugging) will be nullified.
v1: Initial version.
v2: Based on review comments from Daniel,
- Added a check to know hardware status and load the firmware if not loaded.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala
On Tuesday 04 August 2015 12:17 AM, Zanoni, Paulo R wrote:
Em Seg, 2015-08-03 às 21:55 +0530, Animesh Manna escreveu:
The following patches helps to solve PC10 entry issue for SKL.
Detailed description about the changes done to solve the issue
is mentioned in commit message of each patch.
All t
: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
properly.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-bt: Vathsala Nagaraju
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a
comment from Vathsala.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/i915/i915_drv.c | 12 ++--
drivers/gpu/drm/i915/intel_drv.h| 2
to enter PC10.
v1: Initial version.
v2: Corrected firmware size during memcpy(). (Suggested by Sunil)
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers
On Monday 03 August 2015 09:55 PM, Animesh Manna wrote:
As csr firmware is taking care of loading the firmware,
so no need for driver to load again.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
Mmio register access after dc6/dc5 entry is causing the
system hang, so enabling dc6 as the last call in suspend flow.
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
.
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-bt: Vathsala Nagaraju
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915
On Wednesday 29 July 2015 04:40 PM, Sunil Kamath wrote:
On Tuesday 28 July 2015 04:53 PM, Sunil Kamath wrote:
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
As csr firmware is taking care of loading the firmware,
so no need for driver to load again.
Cc: Damien Lespiau
Cc: Imre Deak
On Tuesday 28 July 2015 04:39 PM, Sunil Kamath wrote:
On Tuesday 28 July 2015 01:38 PM, Nagaraju, Vathsala wrote:
Signed-off-by: Vatsala Nagaraju
It's Vathsala Nagaraju
Commit message: Removed byte swapping for csr firmware.
Commit message does not convey as to why the change was
On Tuesday 28 July 2015 04:53 PM, Sunil Kamath wrote:
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
As csr firmware is taking care of loading the firmware,
so no need for driver to load again.
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off
On Tuesday 28 July 2015 04:53 PM, Sunil Kamath wrote:
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
As csr firmware is taking care of loading the firmware,
so no need for driver to load again.
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
As csr firmware is taking care of loading the firmware,
so no need for driver to load again.
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
---
drivers/gpu/drm/i915
wapping for csr
firmware.
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vatsala Nagaraju
---
drivers/gpu/drm/i915/intel_csr.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/
call.
Cc: Daniel Vetter
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
Signed-off-by: Vathsala Nagaraju
Please use the approach I've laid out in my original patch series with
"drm/i915: use correct power domain for csr loading" and "drm/
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
Added stepping info in intel_csr.c which is required to extract
specific firmware from packaged dmc firmware.
Cc: Vetter, Daniel
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
Modified HAS_CSR macro defination which earlier only supported
for skl, now added support for BXT.
Cc: Vetter, Daniel
Cc: Damien Lespiau
Cc: Imre Deak
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/i915_drv.h
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
Cc: Damien Lespiau
Cc: Rodrigo Vivi
Cc: Sunil Kamath
Signed-off-by: Animesh Manna
---
Please update the commit message header relevant details.
even one liner is sufficient.
Minor thing to take care.
Reviewed-by: A.Sunil Kamath
On Sunday 26 July 2015 12:30 AM, Animesh Manna wrote:
Display microcontroller(DMC) used to save and restore display engine status
while entering into low power display states for gen9 platform.
Though skylake and broxton both are gen9 platform but dmc act diferently.
Skylake is solely dependednt
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