nal Message-
> From: Patchwork
> Sent: Friday, March 13, 2020 7:34 PM
> To: Navik, Ankit P
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.SPARSE: warning for Dynamic EU configuration of Slice/Sub-
> slice/EU (rev6)
>
> == Series Details ==
>
> Series: Dyna
> On 26/11/2019 04:21, Tvrtko Ursulin wrote:
>
> On 26/11/2019 04:51, Ankit Navik wrote:
> > High resolution timer is used for predictive governor to control
> > eu/slice/subslice based on workloads.
> >
> > param is provided to enable/disable/update timer configuration
> >
> > V2:
> > * Fix cod
Hi Chris,
Thank you for your feedback.
> On 26/11/2019 10:52, Charis Wilson wrote:
>
> Quoting Tvrtko Ursulin (2019-11-26 10:51:22)
> > You mentioned you did some experiment where you did something on
> > context pinning and that it did not work so well. I don't know what
> > that was though. I
> -Original Message-
> From: Chris Wilson
> Sent: Monday, November 25, 2019 1:46 PM
> To: Navik, Ankit P ; intel-
> g...@lists.freedesktop.org
> Cc: Navik, Ankit P ; Anand, Vipin
>
> Subject: Re: [Intel-gfx] [PATCH v5 0/3] drm/i915: Context aware user agnos
Hi Joonas,
On Fri, Dec 14, 2018 at 3:57 PM Joonas Lahtinen
wrote:
>
> Quoting Ankit Navik (2018-12-11 12:14:17)
> > drm/i915: Context aware user agnostic EU/Slice/Sub-slice control
> > within kernel
> >
> > Current GPU configuration code for i915 does not allow us to change
> > EU/Slice/Sub-sl
Hi Tvrtko,
On Tue, Dec 11, 2018 at 5:18 PM Tvrtko Ursulin
wrote:
>
>
> On 11/12/2018 10:14, Ankit Navik wrote:
> > drm/i915: Context aware user agnostic EU/Slice/Sub-slice control
> > within kernel
> >
> > Current GPU configuration code for i915 does not allow us to change
> > EU/Slice/Sub-sl
Hi Tvrtko,
> On Tue, Dec 11, 2018 at 6:17 PM Tvrtko Ursulin
> wrote:
>
>
> On 11/12/2018 10:14, Ankit Navik wrote:
> > From: Praveen Diwakar
> >
> > This patch will select optimum eu/slice/sub-slice configuration based
> > on type of load (low, medium, high) as input.
> > Based on our readin
Hi Tvrtko,
> On Tue, Nov 6, 2018 at 3:14 PM Tvrtko Ursulin
> wrote:
>
>
> On 06/11/2018 04:13, Ankit Navik wrote:
> > From: Praveen Diwakar
> >
> > This patch gives us the active pending request count which is yet to
> > be submitted to the GPU
> >
> > Signed-off-by: Praveen Diwakar
> > Sig
Hi Tvrtko,
> On Wed, Nov 7, 2018 at 4:08 PM Tvrtko Ursulin
> wrote:
>
>
> On 06/11/2018 04:13, Ankit Navik wrote:
> > drm/i915: Context aware user agnostic EU/Slice/Sub-slice control
> > within kernel
> >
> > Current GPU configuration code for i915 does not allow us to change
> > EU/Slice/Sub-
Hi Tvrtko,
> -Original Message-
> From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
> Sent: Tuesday, September 25, 2018 1:56 PM
> To: Navik, Ankit P ; intel-gfx@lists.freedesktop.org
> Cc: J Karanje, Kedar ; Diwakar, Praveen
> ; Marathe, Yogesh
> ;
: Diwakar, Praveen ; Marathe, Yogesh
> ; Navik, Ankit P ;
> Muthukumar, Aravindan
> Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915: set optimum eu/slice/sub-slice
> configuration based on load type
>
>
> On 21/09/2018 10:13, kedar.j.kara...@intel.com wrote:
> > From: Praveen Di
Hi Tvrtko,
> -Original Message-
> From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
> Sent: Friday, September 21, 2018 6:22 PM
> To: J Karanje, Kedar ; intel-
> g...@lists.freedesktop.org
> Cc: Diwakar, Praveen ; Marathe, Yogesh
> ; Navik, Ankit P ;
&g
Hi Tvrtko,
> -Original Message-
> From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
> Sent: Friday, September 21, 2018 6:10 PM
> To: J Karanje, Kedar ; intel-
> g...@lists.freedesktop.org
> Cc: Diwakar, Praveen ; Marathe, Yogesh
> ; Navik, Ankit P ;
&g
Hi Tvrtko,
Thank you for your valuable comments. We have gone through it.
I'll be submitting revised patch-sets after incorporating all your review
comments.
> On 21/09/2018 10:13, kedar.j.kara...@intel.com wrote:
> > From: Praveen Diwakar
> >
> > High resoluton timer is used for this purpose
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