Re: [Intel-gfx] [PATCH] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start

2018-10-25 Thread Mark Janes
Chris Wilson writes: > Since commit 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu > notifiers") we have been able to report failure from > mmu_invalidate_range_start which allows us to use a trylock on the > struct_mutex to avoid potential recursion and report -EBUSY instead. > Furth

Re: [Intel-gfx] [PATCH v2] drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake.

2018-01-05 Thread Mark Janes
Tested-by: Mark Janes Geminilake GPU hangs caused by tesselation tests in VulkanCTS and GLCTS are fixed by the Mesa patch that toggles this bit. Kenneth Graunke writes: > Geminilake requires the 3D driver to select whether barriers are > intended for compute shaders, or tessellation c

Re: [Intel-gfx] regression since v4.9-rcX: "Resetting chip after gpu hang" times out(?) and is repeated every 20th second

2017-01-17 Thread Mark Janes
Bjørn Mork writes: > Hello, > > I've been having occasional GPU HANGs on my Skylake laptop ever since I > got it, originally reported here: > https://bugs.freedesktop.org/show_bug.cgi?id=96894 Several similar bugs have been resolved recently. I apologize for missing this one. I'll update this

Re: [Intel-gfx] [PATCH] drm/i915: Make sure DC writes are coherent on flush.

2016-01-13 Thread Mark Janes
Tested-by: Mark Janes Francisco Jerez writes: > We need to set the DC FLUSH PIPE_CONTROL bit on Gen7+ to guarantee > that writes performed via the HDC are visible in memory. Fixes an > intermittent failure in a Piglit test that writes to a BO from a > shader using GL ato