Hi, Alexander:
I think you are right that GEN3 hardware CXSR requires enabling low
power render writes.
This patch is OK for me, but DRM_DEBUG_KMS is better than printk.
Acked-by : Li Peng
On Mon, 2010-10-04 at 19:31 -0400, Alexander Lam wrote:
> Using 2.6.35.7 (this patch is against
Hello, Alexander:
I have met system hang issue when directly enable SR on 945, so I
enable/disable SR depends on h/w idle status.
If you don't see hang anymore. Then it should be fixed in other commits
(probably as you said, 944001201ca0196bcdb088129e5866a9f379d08c)
Please fix the patch format in
Enable self-refresh on 945 when just one CRTC is activated.
Otherwise user would get display flicker with dual display.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=27667
Signed-off-by: Li Peng
---
drivers/gpu/drm/i915/intel_display.c | 12 +++-
1 files changed, 7
Pineview with DDR3 memory has different latencies to enable CxSR.
This patch updates CxSR latency table to add Pineview DDR3 latency
configuration. It also adds one flag "is_ddr3" for checking DDR3
setting in MCHBAR.
Cc: Shaohua Li
Cc: Zhao Yakui
Signed-off-by: Li Peng
---
Rebase
On Mon, May 17, 2010 at 05:26:38PM +0800, Zhenyu Wang wrote:
> On 2010.05.17 22:07:30 +0800, Li Peng wrote:
> > Pineview with DDR3 memory has different latencies to enable CxSR.
> > This patch updates CxSR latency table to add Pineview DDR3 latency
> > configuration. It also a
Pineview with DDR3 memory has different latencies to enable CxSR.
This patch updates CxSR latency table to add Pineview DDR3 latency
configuration. It also adds one flag "is_ddr3" for checking DDR3
setting in MCHBAR.
Cc: Shaohua Li
Cc: Zhao Yakui
Signed-off-by: Li Peng
---
drive
