sday, May 2, 2019 3:45 PM
> > > To: Sharma, Shashank
> > > Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville > > a...@intel.com>; Lankhorst,
> > > Maarten
> > > Subject: Re: [Intel-gfx] [PATCH] drm/i915/GLK: Properly handle
> > > plane CSC for
mån 2019-04-15 klockan 15:43 +0300 skrev Ville Syrjälä:
> On Mon, Apr 15, 2019 at 10:57:52AM +0000, Lankhorst, Maarten wrote:
> > fre 2019-04-12 klockan 15:51 +0530 skrev Uma Shankar:
> > > Introduced a client cap for advance cap mode
> > > capability. Userspace should
mån 2019-04-15 klockan 19:26 +0530 skrev Sharma, Shashank:
> > -Original Message-
> > From: Lankhorst, Maarten
> > Sent: Monday, April 15, 2019 4:28 PM
> > To: Shankar, Uma ; intel-gfx@lists.freedeskt
> > op.org; dri-
> > de...@lists.freedesktop.org
>
fre 2019-04-12 klockan 15:51 +0530 skrev Uma Shankar:
> Introduced a client cap for advance cap mode
> capability. Userspace should set this to get
> to be able to use the new gamma_mode property.
>
> If this is not set, driver will work in legacy
> mode.
>
> Suggested-by: Ville Syrjälä
> Signed
tis 2019-03-19 klockan 14:14 +0530 skrev Uma Shankar:
> Existing LUT precision structure is having only 16 bit
> precision. This is not enough for upcoming enhanced hardwares
> and advance usecases like HDR processing. Hence added a new
> structure with 32 bit precision values. Also added the code,
tis 2019-03-19 klockan 14:00 +0530 skrev Uma Shankar:
> Multi Segment Gamma Mode is added in Gen11+ platforms.
> Added a property interface to enable that.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/i915_drv.h| 1 +
> drivers/gpu/drm/i915/intel_color.c | 23
Hey,
sön 2018-09-16 klockan 13:45 +0530 skrev Uma Shankar:
> This is how a typical display color hardware pipeline looks like:
> +---+
> |RAM|
> | +--++-++-+ |
> | | FB 1 || FB
ons 2018-08-22 klockan 12:11 +0100 skrev Brian Starkey:
> Hi,
>
> On Wed, Aug 22, 2018 at 12:53:58PM +0300, Ville Syrjälä wrote:
> > On Wed, Aug 22, 2018 at 08:40:19AM +0000, Lankhorst, Maarten wrote:
> > > fre 2018-08-17 klockan 19:48 +0530 skrev Uma Shankar:
> &g
fre 2018-08-17 klockan 19:48 +0530 skrev Uma Shankar:
> Add a blob property for plane CSC usage.
>
> v2: Rebase
>
> v3: Fixed Sean, Paul's review comments. Moved the property from
> mode_config to drm_plane. Created a helper function to instantiate
> these properties and removed from drm_mode_cre
tor 2018-06-21 klockan 14:09 -0700 skrev Radhakrishna Sripada:
> On Thu, Jun 21, 2018 at 08:43:56PM +0530, Vandita Kulkarni wrote:
> > Alpha blending with alpha 0 and 0xff passes through
> > alpha math and rounding logic causing differences
> > compared to fully transparent or opaque plane,resultin
tor 2018-06-21 klockan 19:00 +0530 skrev Vandita Kulkarni:
> Alpha blending with alpha 0 and 0xff passes through
> alpha math and rounding logic causing differences
> compared to fully transparent or opaque plane,resulting
> in CRC mismatch.
> This WA on icl and above enables hardware to bypass alp
Shankar, Uma schreef op di 26-09-2017 om 15:41 [+0530]:
> > -Original Message-
> > From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On
> > Behalf Of
> > Lankhorst, Maarten
> > Sent: Tuesday, September 26, 2017 3:36 PM
> > To: Shan
Hey,
Uma Shankar schreef op di 26-09-2017 om 13:32 [+0530]:
> Define a helper function to set legacy gamma table
> size for planes.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/drm_color_mgmt.c | 41
> ++
> include/drm/drm_color_mgmt.h |3
Mahesh Kumar schreef op di 18-07-2017 om 18:12 [+0530]:
> Hi Daniel,
>
> On Monday 17 July 2017 12:56 PM, Daniel Vetter wrote:
> > On Fri, Jun 30, 2017 at 05:40:58PM +0530, Mahesh Kumar wrote:
> > > Gen9+ Interlace fetch mode doesn't support few plane
> > > configurations & pipe scaling.
> > > -
Mahesh Kumar schreef op wo 05-07-2017 om 20:01 [+0530]:
> From: "Kumar, Mahesh"
>
> This patch adds IPC support for platforms. This patch enables IPC
> only for BXT/KBL platform as for SKL recommendation is to keep it
> disabled.
CFL/CNL missing. ;-)
> IPC (Isochronous Priority Control) is the ha
Mahesh Kumar schreef op wo 21-06-2017 om 11:44 [+0530]:
> This patch introduce addition wrapper for fixed point 16.16
> operations.
> Which will be used by later patches to avoid direct member variables
> access of fixed_16_16_t structure.
>
> add_fixed16 : takes 2 fixed_16_16_t variable & returns
Hey,
Mahesh Kumar schreef op di 13-06-2017 om 11:34 [+0530]:
> GEN > 9 require transition WM to be programmed if IPC is enabled.
> This patch calculates & enable transition WM for supported platforms.
> If transition WM is enabled, Plane read requests are sent at high
> priority until filling abov
Mahesh Kumar schreef op di 13-06-2017 om 11:34 [+0530]:
> linetime wm is time taken to fill a single display line with given
> clock
> rate, multiplied by 8.
> This patch reuses the common code of hsw_compute_linetime_wm &
> skl_compute_linetime_wm.
>
> Signed-off-by: Mahesh Kumar
> ---
> driver
Mahesh Kumar schreef op di 13-06-2017 om 11:34 [+0530]:
> This patch make naming of fixed-point wrappers consistent
> operation__<1st operand>_<2nd operand>
> also shorten the name for fixed_16_16 to fixed16
>
> s/u32_to_fixed_16_16/u32_to_fixed16
> s/fixed_16_16_to_u32/fixed16_to_u32
> s/fixed_16
Mahesh Kumar schreef op di 30-05-2017 om 18:26 [+0530]:
> Hi Maarten,
>
> Thanks for review :)
>
>
> On Tuesday 30 May 2017 03:30 PM, Maarten Lankhorst wrote:
> > Op 26-05-17 om 17:15 schreef Mahesh Kumar:
> > > Don't trust cached DDB values. Recalculate the ddb value if
> > > cached value
> > >
Mahesh Kumar schreef op do 18-05-2017 om 15:39 [+0530]:
> From: "Kumar, Mahesh"
>
> A display resolution is only supported if it meets all the
> restrictions
> below for Maximum Pipe Pixel Rate.
>
> The display resolution must fit within the maximum pixel rate output
> from the pipe. Make sure t
Mahesh Kumar schreef op do 18-05-2017 om 15:39 [+0530]:
> From: "Kumar, Mahesh"
>
> This patch implements new DDB allocation algorithm as per HW team
> recommendation. This algo takecare of scenario where we allocate less
> DDB
> for the planes with lower relative pixel rate, but they require mor
Mahesh Kumar schreef op ma 08-05-2017 om 17:18 [+0530]:
> Fail the flip if no FB is present but plane_state is set as visible.
> Above is not a valid combination so instead of continue fail the
> flip.
Why is this patch necessary? drm_atomic_plane_check handles this.
~Maarten
Daniel Vetter schreef op zo 26-02-2017 om 21:00 [+0100]:
> On Fri, Feb 24, 2017 at 12:52:53AM +, Pandiyan, Dhinakaran wrote:
> >
> > On Thu, 2017-02-16 at 09:09 +0000, Lankhorst, Maarten wrote:
> > >
> > > Daniel Vetter schreef op di 14-02-2017 om 20:51 [+01
Pandiyan, Dhinakaran schreef op ma 13-02-2017 om 22:48 [+]:
> On Mon, 2017-02-13 at 21:26 +, Pandiyan, Dhinakaran wrote:
> >
> > On Mon, 2017-02-13 at 09:05 +0000, Lankhorst, Maarten wrote:
> > >
> > > Pandiyan, Dhinakaran schreef op do 09-02-2017 om 1
Daniel Vetter schreef op di 14-02-2017 om 20:51 [+0100]:
> On Mon, Feb 13, 2017 at 10:26 PM, Pandiyan, Dhinakaran
> wrote:
> > On Mon, 2017-02-13 at 09:05 +0000, Lankhorst, Maarten wrote:
> > > Pandiyan, Dhinakaran schreef op do 09-02-2017 om 18:55 [+]:
> > >
Pandiyan, Dhinakaran schreef op do 09-02-2017 om 18:55 [+]:
> On Thu, 2017-02-09 at 09:01 +0000, Lankhorst, Maarten wrote:
> >
> > Dhinakaran Pandiyan schreef op wo 08-02-2017 om 22:38 [-0800]:
> > >
> > > Having a ->atomic_release callback is usef
Dhinakaran Pandiyan schreef op wo 08-02-2017 om 22:38 [-0800]:
> Having a ->atomic_release callback is useful to release shared
> resources
> that get allocated in compute_config(). This function is expected to
> be
> called in the atomic_check() phase before new resources are acquired.
>
> v2: Mo
Rami Ben Hassine schreef op do 26-01-2017 om 16:36 [+0100]:
> From: ramibh
>
> This is atomic modesetting acceptance tests added to
> feat_profile.json. Wating for your feedback.
>
> ---
> tests/feat_profile.json | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/t
Robert Foss schreef op do 12-01-2017 om 11:30 [-0500]:
>
> On 2017-01-12 04:14 AM, Lankhorst, Maarten wrote:
> >
> > Robert Foss schreef op wo 11-01-2017 om 15:41 [-0500]:
> > >
> > > buf array may overflow with when writing '\0' if
> >
Robert Foss schreef op wo 11-01-2017 om 15:41 [-0500]:
> buf array may overflow with when writing '\0' if
> MAX_LINE_LEN bytes are read during read().
How?
char buf[MAX_LINE_LEN + 1];
> Signed-off-by: Robert Foss
> ---
> lib/igt_debugfs.c | 8 +---
> 1 file changed, 5 insertions(+), 3 delet
Hey,
Mahesh Kumar schreef op ma 28-11-2016 om 18:37 [+0530]:
> Hi,
>
> Will keep WA number in commit message/WA location.
> thanks,
Sounds good, with that fixed patches 1-5 and 7 look good to me.
I think patch 6 will no longer be required since the workaround status
will also be kept inside inte
Mahesh Kumar schreef op di 29-11-2016 om 19:17 [+0530]:
>
> On Tuesday 29 November 2016 03:16 PM, Lankhorst, Maarten wrote:
> >
> > Mahesh Kumar schreef op di 29-11-2016 om 11:12 [+0530]:
> > >
> > > Hi,
> > >
> > >
> > >
Mahesh Kumar schreef op di 29-11-2016 om 11:12 [+0530]:
> Hi,
>
>
> On Thursday 24 November 2016 06:21 PM, Lankhorst, Maarten wrote:
> >
> > Mahesh Kumar schreef op do 24-11-2016 om 09:31 [+0530]:
> > >
> > > This patch implemnets Workariunds
Mahesh Kumar schreef op do 24-11-2016 om 09:31 [+0530]:
> This patch implemnets Workariunds related to display arbitrated
> memory
> bandwidth. These WA are applicabe for all gen-9 based platforms.
>
> Changes since v1:
> - Rebase on top of Paulo's patch series
> Changes since v2:
> - Address re
Mahesh Kumar schreef op do 24-11-2016 om 09:31 [+0530]:
> If IPC is enabled in BXT, display underruns are observed.
> WA: The Line Time programmed in the WM_LINETIME register should be
> half of the actual calculated Line Time.
>
> Programmed Line Time = 1/2*Calculated Line Time
>
> Signed-off-by
Hey,
Jesse Barnes schreef op vr 19-02-2016 om 12:01 [-0800]:
> On 02/19/2016 11:53 AM, Ville Syrjälä wrote:
> > On Fri, Feb 19, 2016 at 11:28:05AM -0800, Jesse Barnes wrote:
> >> On 02/18/2016 06:26 AM, john.c.harri...@intel.com wrote:
> >>> From: John Harrison
> >>>
> >>> MMIO flips are the pre
Hey,
Gabriel Feceoru schreef op wo 11-11-2015 om 20:27 [+0200]:
>
> On 11.11.2015 16:21, Jani Nikula wrote:
> > On Wed, 11 Nov 2015, Ander Conselvan De Oliveira
> > wrote:
> >> On Tue, 2015-11-10 at 14:53 +0200, Jani Nikula wrote:
> >>> Ander, Maarten, where are we with this? Is it horribly wr
Hey,
Dave Jones schreef op di 22-09-2015 om 21:49 [-0400]:
> On Tue, Sep 22, 2015 at 09:15:58AM -0700, Matt Roper wrote:
> > On Tue, Sep 22, 2015 at 05:13:55PM +0200, Daniel Vetter wrote:
> > > On Tue, Sep 22, 2015 at 08:00:17AM -0700, Jesse Barnes wrote:
> > > > Cc'ing Maarten and Matt; I'm gu
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