Re: [Intel-gfx] [PATCH] drm/i915: Disable DC6 for now.

The current DC6 functionality is stable enough for development and is badly needed for working down other platform power issues. I'm fine if you want to disable it by default, but please only do so in conjunction with i915 kernel override flags to reenable it at runtime. Gavin Hindman Senior P

Re: [Intel-gfx] [PATCH 6/7] drm/i915: use compute_page_offset() on SKL too

What's the next step on this patch? Gavin Hindman Senior Program Manager SSG/OTC – Open Source Technology Center -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Ville Syrjälä Sent: Thursday, September 24, 2015 10:10 AM To: Zanoni, Paulo R

Re: [Intel-gfx] [DMC_BUGFIX_SKL_V2 3/5] drm/i915/skl: Making DC6 entry is the last call in suspend flow.

You believe suspend w/ DC6 should work due to the unconditional power-well reference, or you don't know and just couldn't merge since the patch didn’t apply? Gavin Hindman Senior Program Manager SSG/OTC – Open Source Technology Center -Original Message- From: Intel-gfx [mailto:intel-gfx

Re: [Intel-gfx] [DMC_BUGFIX_SKL_V2 4/5] drm/i915/skl: Do not disable cdclk PLL if csr firmware is present

Unless I'm misreading that would imply that we are moving away from our previous position that DMC FW is optional, correct?Would this not render power-sequencing broken if a distro chose not to include DMC FW? Gavin Hindman Senior Program Manager SSG/OTC – Open Source Technology Center ---

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Check live status before reading edid

Jani - do you believe that this series will need to be reworked following merge of your cleanup series? We've got some outstanding CHV hot-plug issues that Sonika's series should fix, so we need to get it in, but should definitely take the path towards longer-term quality. Gavin Hindman Senio

Re: [Intel-gfx] [PATCH 00/13] Atomic watermark updates (v3)

Does this series comprehend all of the ddr-dvfs/PM-5 watermark reworks that Ville did towards the end of CHV, or is this series additive to that? Gavin Hindman Senior Program Manager SSG/OTC – Open Source Technology Center -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lis

Re: [Intel-gfx] [PATCH] drm/i915: remove intermediate link rate entries for CHV

This applies to all CHV derivatives, including BSW? Gavin Hindman -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Sivakumar Thulasimani Sent: Thursday, July 30, 2015 1:45 AM To: ville.syrj...@linux.intel.com; intel-gfx@lists.freedesktop.o

Re: [Intel-gfx] [PATCH 3/5] drm/i915/chv: Set min freq to efficient

>On Thu, Feb 26, 2015 at 08:46:56PM +0530, deepak.s at >linux.intel.com wrote: >> From: Deepak S > linux.intel.com> >> >> After feedback from the hardware team, now we set the GPU m