Re: [Intel-gfx] [PATCH] drm/i915: Fix memory leaks in scatterlist

On Wed, Feb 01, 2023 at 03:28:01PM -0800, Matt Atwood wrote: > This patch fixes memory leaks on error escapes in i915_scatterlist.c > > Fixes: c3bfba9a2225 ("drm/i915: Check for integer truncation on scatterlist > creation") > Cc: Chris Wilson > Signed-off-by: Matt

[Intel-gfx] [PATCH v2] drm/i915/dg2: Add Wa_1509727124

Bspec: 46052 Reviewed-by: Matt Roper Signed-off-by: Harish Chegondi --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +++ 2 files changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH] drm/i915/dg2: Add Wa_1509727124

Bspec: 46052 Cc: Matt Roper Signed-off-by: Harish Chegondi --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/gt: Cleanup interface for MCR operations

e >> XEHPSDV_CCS_BASE_SHIFT) * > SZ_64K; > > /* FIXME: Remove this when we have small-bar enabled */ > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c > b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 97d7f30b1229..e42fbb982bb3 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -1083,7 +1083,7 @@ static void __add_mcr_wa(struct intel_gt *gt, struct > i915_wa_list *wal, > gt->default_steering.instanceid = subslice; > > if (drm_debug_enabled(DRM_UT_DRIVER)) > - intel_gt_report_steering(&p, gt, false); > + intel_gt_mcr_report_steering(&p, gt, false); > } > > static void > @@ -1624,13 +1624,13 @@ wa_list_apply(struct intel_gt *gt, const struct > i915_wa_list *wal) > u32 val, old = 0; > > /* open-coded rmw due to steering */ > - old = wa->clr ? intel_gt_read_register_fw(gt, wa->reg) : 0; > + old = wa->clr ? intel_gt_mcr_read_any_fw(gt, wa->reg) : 0; > val = (old & ~wa->clr) | wa->set; > if (val != old || !wa->clr) > intel_uncore_write_fw(uncore, wa->reg, val); > > if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) > - wa_verify(wa, intel_gt_read_register_fw(gt, wa->reg), > + wa_verify(wa, intel_gt_mcr_read_any_fw(gt, wa->reg), > wal->name, "application"); > } > > @@ -1661,7 +1661,7 @@ static bool wa_list_verify(struct intel_gt *gt, > > for (i = 0, wa = wal->list; i < wal->count; i++, wa++) > ok &= wa_verify(wa, > - intel_gt_read_register_fw(gt, wa->reg), > + intel_gt_mcr_read_any_fw(gt, wa->reg), > wal->name, from); > > intel_uncore_forcewake_put__locked(uncore, fw); > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > index dea138d78111..ba7541f3ca61 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > @@ -314,7 +314,7 @@ static long __must_check guc_mmio_reg_add(struct intel_gt > *gt, >* tracking, it is easier to just program the default steering for all >* regs that don't need a non-default one. >*/ > - intel_gt_get_valid_steering_for_reg(gt, reg, &group, &inst); > + intel_gt_mcr_get_nonterminated_steering(gt, reg, &group, &inst); > entry.flags |= GUC_REGSET_STEERING(group, inst); > > slot = __mmio_reg_add(regset, &entry); With the above minor fixes to comments Reviewed-by: Harish Chegondi > -- > 2.35.3 >

Re: [Intel-gfx] [PATCH] drm/i915/pvc: Add register steering

as_logical_ring_contexts = 1, \ > .has_logical_ring_elsq = 1, \ > - .has_mslices = 1, \ > + .has_mslice_steering = 1, \ > .has_rc6 = 1, \ > .has_reset_engine = 1, \ > .has_rps = 1, \ > @@ -1091,6 +1091,7 @@ static const struct intel_device_info ats_m_info = { > .has_3d_pipeline = 0, \ > .has_guc_deprivilege = 1, \ > .has_l3_ccs_read = 1, \ > + .has_mslice_steering = 0, \ > .has_one_eu_per_fuse_bit = 1 > > __maybe_unused > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > b/drivers/gpu/drm/i915/intel_device_info.h > index 346f17f2dce8..08341174ee0a 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.h > +++ b/drivers/gpu/drm/i915/intel_device_info.h > @@ -157,7 +157,7 @@ enum intel_ppgtt_type { > func(has_logical_ring_contexts); \ > func(has_logical_ring_elsq); \ > func(has_media_ratio_mode); \ > - func(has_mslices); \ > + func(has_mslice_steering); \ > func(has_one_eu_per_fuse_bit); \ > func(has_pooled_eu); \ > func(has_pxp); \ Looks good to me. Reviewed-by: Harish Chegondi > -- > 2.35.3 >

[Intel-gfx] [PATCH v2] drm/i915: Fix possible NULL pointer dereferences in i9xx_update_wm()

Check return pointer from intel_crtc_for_plane() before dereferencing it, as it can be NULL. v2: Moved the NULL check into intel_crtc_active(). Cc: Jani Nikula Cc: Caz Yokoyama Cc: Radhakrishna Sripada Signed-off-by: Harish Chegondi --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed

[Intel-gfx] [PATCH] drm/i915: Fix possible NULL pointer dereferences in i9xx_update_wm()

Check return pointer from intel_crtc_for_plane() before dereferencing it, as it can be NULL. Cc: Jani Nikula Cc: Caz Yokoyama Cc: Radhakrishna Sripada Signed-off-by: Harish Chegondi --- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH] drm/i915: Add checks to prevent NULL pointer dereference

__sg_next() returns NULL if the input sg entry is the last entry in the list. Check the return pointer from __sg_next() to prevent NULL pointer dereference. Cc: Matthew Auld Cc: Thomas Hellström Signed-off-by: Harish Chegondi --- drivers/gpu/drm/i915/i915_scatterlist.c | 10 ++ 1 file

Re: [Intel-gfx] [PATCH v11 08/17] drm/i915/pxp: Implement arb session teardown

On Tue, Sep 21, 2021 at 05:15:22PM -0700, Alan Previn wrote: > From: "Huang, Sean Z" > > Teardown is triggered when the display topology changes and no > long meets the secure playback requirement, and hardware trashes > all the encryption keys for display. Additionally, we want to emit a > teard

Re: [Intel-gfx] [PATCH] drm/i915/dg2: Memory latency values from pcode must be doubled

atency > values. > > Bspec: 49326 > Signed-off-by: Matt Roper Reviewed-by: Harish Chegondi > --- > drivers/gpu/drm/i915/intel_pm.c | 29 +++-- > 1 file changed, 15 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/inte

Re: [Intel-gfx] [PATCH] drm/i915/display/psr: Fix cppcheck warnings

t;) > Signed-off-by: José Roberto de Souza Reviewed-by: Harish Chegondi > --- > drivers/gpu/drm/i915/display/intel_psr.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_p

[Intel-gfx] [PATCH v2 1/1] drm/i915: skip the second CRC even for GEN 7 GPUs

: Maarten Lankhorst Acked-by: Jani Nikula Signed-off-by: Harish Chegondi References: https://bugs.freedesktop.org/show_bug.cgi?id=103191 --- drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 0/1] Invalid CRCs causing CRC mismatch test failures

d and fixed. I am rebasing and resending the patch to seek feedback on how to move further with this patch. Thank You Harish Chegondi (1): drm/i915: skip the second CRC even for GEN 7 GPUs drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 1 file changed, 2 insertions(

Re: [Intel-gfx] [RFC] drm: Do not call drm_probe_ddc() when connector force isn't specified

On Thu, Jun 06, 2019 at 02:56:53PM +0300, Jani Nikula wrote: > On Thu, 06 Jun 2019, Daniel Vetter wrote: > > On Thu, Jun 6, 2019 at 9:38 AM Harish Chegondi > > wrote: > >> > >> This would allow the EDID override to be handled correctly in > >> drm_

[Intel-gfx] [RFC] drm: Do not call drm_probe_ddc() when connector force isn't specified

data via I2C. Cc: Jani Nikula Cc: Ville Syrjälä Signed-off-by: Harish Chegondi References: https://bugs.freedesktop.org/show_bug.cgi?id=107583 --- drivers/gpu/drm/drm_edid.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index

[Intel-gfx] [PATCH 0/1] Reg: igt@kms_pipe_crc_basic@* CRC mismatch test failures

intermittently on shard-SKL and CML-U systems. This patch fixes these test failures on the BYT platform. The reason for these CRC test failures happening on SKL and CML-U platforms is still unknown and is being investigated. Thanks Harish. Harish Chegondi (1): drm/i915: skip the second CRC even for GEN 7

[Intel-gfx] [PATCH 1/1] drm/i915: skip the second CRC even for GEN 7 GPUs

Signed-off-by: Harish Chegondi References: https://bugs.freedesktop.org/show_bug.cgi?id=103191 --- drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 233211fde0ea