Quoting Jani Nikula (2025-07-31 07:05:14-03:00)
>Prefer the register read specific wait function over i915 wait_for_us().
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/icl_dsi.c | 41 ++
> 1 file chan
Quoting Jani Nikula (2025-07-31 07:05:13-03:00)
>Prefer the register read specific wait function over i915 wait_for_us().
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_pch_refclk.c | 14 ++
> 1 file changed, 1
Quoting Jani Nikula (2025-07-31 07:05:12-03:00)
>Prefer the register read specific wait function over i915 wait_for_us().
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display_power.c | 14 ++
> 1 file changed, 1
Quoting Jani Nikula (2025-07-31 07:05:11-03:00)
>Prefer the register read specific wait function over i915 wait_for_us().
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 12
> 1 file changed, 8 insertio
Quoting Jani Nikula (2025-07-31 07:05:10-03:00)
>Prefer the register read specific wait function over i915 wait_for_us().
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 20 +--
> 1 file changed, 1
e bit, I think using
intel_de_wait_custom() works fine here.
Perhaps using plural in wait_bits was not precise?
Anyways,
Reviewed-by: Gustavo Sousa
>+if (ret) {
> drm_err(display->drm, "Timeout waiting for D2D Link enable
> for DDI/PORT_BUF_CTL %c\n&q
Quoting Jani Nikula (2025-07-31 07:05:08-03:00)
>Prefer the register read specific wait function over i915 wait_for().
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 de
>Fixes: 9dc619680de4 ("drm/i915/display: Add function to configure LFPS
>sending")
>Suggested-by: Gustavo Sousa
>Signed-off-by: Jouni Högander
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4
> 1 file changed, 4 insert
sending")
>Suggested-by: Gustavo Sousa
>Signed-off-by: Jouni Högander
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 5 +
> 1 file changed, 5 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>b/drivers/gpu/drm/i915/display/intel_cx0_p
Quoting Jouni Högander (2025-07-22 07:13:16-03:00)
>Ensure phy is accessible on lfps configuration by adding
>intel_cx0_phy_transaction_begin/end around it.
>
>Fixes: 9dc619680de4 ("drm/i915/display: Add function to configure LFPS
>sending")
>Suggested-by: Gustavo
Quoting Jouni Högander (2025-07-22 07:13:15-03:00)
>Currently we are always calling intel_cx0_get_owned_lane_mask when
>intel_lnl_mac_transmit_lfps is called. Avoid this in cases where it's not
>needed.
>
>Signed-off-by: Jouni Högander
Reviewed-by: Gustavo Sousa
>---
, this matches the spec, so
Reviewed-by: Gustavo Sousa
Could you also put the reference to the respective Bspec page in the
trailers? That could be done while pushing, I think.
--
Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 +++-
> 1 file changed, 3 insertio
Quoting Imre Deak (2025-07-19 07:37:56-03:00)
>On Fri, Jul 18, 2025 at 05:16:20PM -0300, Gustavo Sousa wrote:
>> Quoting Imre Deak (2025-07-18 14:17:09-03:00)
>> >On Fri, Jul 18, 2025 at 01:33:26PM -0300, Gustavo Sousa wrote:
>> >> Quoting Imre Deak (2025-07-18 12:5
Quoting Imre Deak (2025-07-18 14:17:09-03:00)
>On Fri, Jul 18, 2025 at 01:33:26PM -0300, Gustavo Sousa wrote:
>> Quoting Imre Deak (2025-07-18 12:54:11-03:00)
>> >On Thu, Jul 17, 2025 at 09:02:45AM -0300, Gustavo Sousa wrote:
>> >> Quoting Chaitanya Kumar Bo
Quoting Imre Deak (2025-07-18 12:54:11-03:00)
>On Thu, Jul 17, 2025 at 09:02:45AM -0300, Gustavo Sousa wrote:
>> Quoting Chaitanya Kumar Borah (2025-07-17 02:16:03-03:00)
>> >Some power wells are only relevant for certain display pipes. Add a check
>> >to ensure we o
Quoting Hogander, Jouni (2025-07-18 10:08:52-03:00)
>On Fri, 2025-07-18 at 09:58 -0300, Gustavo Sousa wrote:
>> Quoting Hogander, Jouni (2025-07-18 07:46:31-03:00)
>> > On Fri, 2025-07-18 at 09:05 +0300, Hogander, Jouni wrote:
>> > > On Thu, 2025-07-17 at 10
Quoting Hogander, Jouni (2025-07-18 07:46:31-03:00)
>On Fri, 2025-07-18 at 09:05 +0300, Hogander, Jouni wrote:
>> On Thu, 2025-07-17 at 10:31 -0300, Gustavo Sousa wrote:
>> > Quoting Jouni Högander (2025-07-17 03:32:58-03:00)
>> > > We are seeing "dmesg-warn/a
Declarations for both intel_io_mmio_fw_write and intel_io_reg_write
where added with commit 01389846f7d6 ("drm/i915: Plumb 'dsb' all way to
the plane hooks"), but they never got used. Let's remove them.
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
dri
; 20 ||
>+!intel_alpm_is_alpm_aux_less(enc_to_intel_dp(encoder),
>crtc_state))
> return;
>
>+owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
This optimization could be on it's own patch.
--
Gustavo Sousa
> for (i = 0; i < 4
ER_DOMAIN_INIT in each power well that has the
bit for POWER_DOMAIN_PIPE_* set for non-fused off pipes. That would
also require removing the POWER_DOMAIN_INIT from the static mapping for
power wells directly responsible for POWER_DOMAIN_PIPE_*.
--
Gustavo Sousa
>+return fals
_CASE and simplify intel_display_wa
>macro. (Jani)
>v3: Print Missing wa number, instead of enum value. (Gustavo, Jani)
>
>Suggested-by: Jani Nikula
>Signed-off-by: Ankit Nautiyal
>Reviewed-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_d
bits are 0. (Gustavo)
>
>Signed-off-by: Ankit Nautiyal
Reviewed-by: Gustavo Sousa
>---
> .../gpu/drm/i915/display/intel_display_wa.c | 12 ++
> .../gpu/drm/i915/display/intel_display_wa.h | 1 +
> drivers/gpu/drm/i915/display/intel_gmbus.c| 39 ---
>
Quoting Gustavo Sousa (2025-07-14 12:07:50-03:00)
>Quoting Chaitanya Kumar Borah (2025-07-14 02:53:44-03:00)
>>WCL has 3 pipes, create power well mapping to reflect
>
>I believe display fuses should reflect that, right? I don't have a WCL
>handy to check that, but I believe
out the
power well mapping during initialization (__set_power_wells) based on
the availability of the associated hardware resource (display pipes in
this case).
That way, we do not need to hardcode different mappings for different
variations of a display arch.
--
Gustavo Sousa
>HW. Rest remains
GPIO_DATA_PULLUP_DISABLE |
>GPIO_CLOCK_PULLUP_DISABLE);
>+preserve_bits |= GPIO_DATA_PULLUP_DISABLE |
>GPIO_CLOCK_PULLUP_DISABLE;
>+
>+/* Wa_16025573575: the masks bits need to be preserved through out */
>+if (intel_display_wa(display, 16025573575))
>+preserve_bits |=
Quoting Lucas De Marchi (2025-07-03 10:55:07-03:00)
>On Thu, Jul 03, 2025 at 09:08:54AM -0300, Gustavo Sousa wrote:
>>Quoting Ville Syrjälä (2025-07-02 18:49:30-03:00)
>>>On Thu, Jul 03, 2025 at 12:29:37AM +0300, Ville Syrjälä wrote:
>>>> On Wed, Jul 02, 2025 at 03:
Quoting Nautiyal, Ankit K (2025-07-03 03:05:54-03:00)
>
>On 7/2/2025 6:41 PM, Gustavo Sousa wrote:
>> Quoting Ankit Nautiyal (2025-07-02 05:46:19-03:00)
>>> As per Wa_16025573575 for PTL, set the GPIO masks bit before starting
>>> bit-bashing and maintain value th
open the spec/hsd for it to double check some details. Othwerwise
>>>>> it just seems like pointless noise that makes it harder to follow
>>>>> the code/figure out what the heck is going on.
>>>> what is the alternative? The current status quo checking by
ther details
>>
>> Splitting it all up into random bits and pieces just means more
>> jumping around all the time, which I find annoying at best.
>
>I suppose one could argue for a more formal thing for these three:
>- which hardware is affected
>- a short human readable explanation of the issue
>- the w/a number for looking up futher details
>
>Might be still a real pain to deal with that due to having to jump
>around, but at least it could be used to force people to document
>each w/a a bit better.
>
>Basically anything that avoids having to wait for the spec/hsd to
>load is a good thing in my book.
>
>There's also the question of what to do with duplicates, as in often
>it seems the same issue is present on multiple platforms under different
>w/a numbers.
With regard to this last paragraph, in my experience, I have seen two
types of situation:
1. Usually we have a single w/a number that is shared accross different
platforms/IPs, which is what we call the lineage number in our
database. What happens sometimes is that people, by mistake, use the
platform specific ticket number instead of the w/a number.
2. Another thing that happens sometimes is that we might have different
hw bugs that have the same workaround implementation. That is the
legitimate case of having our code mapping two or more w/a numbers to
the same implementation.
--
Gustavo Sousa
in the callstack that is
presented with the warning, but I'm wondering if we could do better
here.
Not sure there is a good solution without requiring extra memory to map
each enum member to its corresponding the workaround number.
--
Gustavo Sousa
>+break;
>+}
&
aid about intel_display_needs_wa_16025573575()...
Maybe it would be simpler to just inline the conditions with a single
line here instead of adding 5 extra lines to the file.
--
Gustavo Sousa
> default:
> drm_WARN(display->drm, 1, "Missing Wa number: %d\n&q
Quoting Jani Nikula (2025-06-13 06:13:55-03:00)
>On Fri, 13 Jun 2025, "Nautiyal, Ankit K" wrote:
>> On 6/12/2025 5:30 PM, Gustavo Sousa wrote:
>>> Instead of open-coding the conditions for the workaround in three
>>> different places in the fi
Quoting Jani Nikula (2025-06-12 09:46:17-03:00)
>The drm panel funcs should be static, fix it.
>
>Fixes: 3fdd5bfbd638 ("drm/i915/panel: register drm_panel and call
>prepare/unprepare for ICL+ DSI")
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
&g
Quoting Jani Nikula (2025-06-12 08:37:10-03:00)
>Align with all the other atomic check functions.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_plane.c | 2 +-
>
Quoting Jani Nikula (2025-06-12 08:37:11-03:00)
>Rename to follow filename based naming.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_plane.c | 4 ++--
> drivers
Quoting Jani Nikula (2025-06-12 08:37:08-03:00)
>Align with intel_plane_check_src_coordinates(). The "atomic" is
>superfluous.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 8
&g
Quoting Jani Nikula (2025-06-12 08:37:07-03:00)
>It's all atomic, no need to emphasize this.
>
>Signed-off-by: Jani Nikula
I think we should also update the kernel-doc directives in
Documentation/gpu/i915.rst. With that addressed,
Reviewed-by: Gustavo Sousa
>---
>
Quoting Jani Nikula (2025-06-12 08:37:09-03:00)
>intel_plane_atomic_check() isn't used outside of intel_plane.c. Make it
>static. While at it, rename to vacate the name for subsequent changes.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drive
if (DISPLAY_VER(display) == 30)
Instead of open-coding the conditions for the workaround in three
different places in the file, I think we should have a function
needs_wa_16025573575() and use it.
Also, note that the workaround is also required for WCL (display version
3
Quoting Luca Coelho (2025-05-20 05:26:59-03:00)
>We always pass 0 in the set argument of skl_scaler_get_filter_select()
>calls, so the argument is unnecessary. Remove it.
>
>Signed-off-by: Luca Coelho
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display
>REG_GENMASK(15, 12)
>+#define _XE3_DDI_CLOCK_SELECT_MASKREG_GENMASK(16,
>12)
Since bit 16 is unused for pre-Xe3 display IPs, I wonder if we should
simply redefine XELPDP_DDI_CLOCK_SELECT_MASK to be REG_GENMASK(16, 12)
and add a comment not
k,
>which has also ceased to exist.
>
>Reported-by: Gustavo Sousa
>Closes:
>https://lore.kernel.org/r/174656703321.1401.8627403371256302...@intel.com
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/gt/intel_rps_types.h | 2 +-
> 1 file
t;Jani.
>
>
>Jani Nikula (4):
> drm/xe/rpm: use to_xe_device() instead of container_of
> drm/xe/display: do not reference xe->display inline
> drm/i915: do not reference i915->display inline
> drm/{i915,xe}: convert i915 and xe display members into pointers
Series
/crtc: pass struct intel_display to DISPLAY_VER()
On the series,
Reviewed-by: Gustavo Sousa
>
> drivers/gpu/drm/i915/display/intel_bios.h | 2 +-
> drivers/gpu/drm/i915/display/intel_crtc.c | 3 +--
> drivers/gpu/drm/i915/display/intel_display_core.h | 4 +---
> drivers
between i915 core and
>display.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> .../gpu/drm/i915/display/intel_display_irq.c | 5 ++--
> .../gpu/drm/i915/display/intel_display_rps.c | 27 +++
> .../gpu/drm/i915/display/intel_display_rps.h
Quoting Jani Nikula (2025-05-06 10:06:48-03:00)
>With all users of i915_enable_asle_pipestat() inside
>intel_display_irq.c, we can make the function static.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 7
Quoting Jani Nikula (2025-05-06 10:06:47-03:00)
>Split out i965_display_irq_postinstall() similar to other platforms.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> .../gpu/drm/i915/display/intel_display_irq.c| 17 +
> .../gp
Quoting Jani Nikula (2025-05-06 10:06:46-03:00)
>Split out i915_display_irq_postinstall() similar to other platforms.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 16
> drivers/gp
ay_irq_reset() functions.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> .../gpu/drm/i915/display/intel_display_irq.c| 17 -
> drivers/gpu/drm/i915/i915_irq.c | 4
> 2 files changed, 12 insertions(+), 9 deletions(-)
>
&
Quoting Jani Nikula (2025-05-06 10:06:44-03:00)
>All users of valleyview_enable_display_irqs() and
>valleyview_disable_display_irqs() have a lock/unlock pair. Move the
>locking inside the functions.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers
Quoting Jani Nikula (2025-05-06 10:06:43-03:00)
>All users of vlv_display_irq_reset() have a lock/unlock pair. Move the
>locking inside the function.
>
>Signed-off-by: Jani Nikula
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 4
>
ent. I think
we can update the comment to make it more accurate. I guess that
could be on a patch of its own...
So, with the small tweak suggested in (1),
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 43 +++---
> .../gpu/drm/i915/display
Quoting Matt Roper (2025-03-14 18:17:37-03:00)
>On Tue, Mar 11, 2025 at 02:04:50PM -0300, Gustavo Sousa wrote:
>> Update intel_bw.c internally use intel_display. Conversion of the public
>> interface will come as a follow-up.
>>
>> v2:
>> - Prefer intel_u
Quoting Gustavo Sousa (2025-03-11 14:04:49-03:00)
>Bandwidth parameters for Xe3_LPD have been updated with respect to
>previous display releases. Encode them into xe3lpd_sa_info and use that
>new struct.
>
>Since we are touching intel_bw.c, also take the opportunity convert it
&g
Quoting Jani Nikula (2025-03-11 15:04:04-03:00)
>On Tue, 11 Mar 2025, Gustavo Sousa wrote:
>> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
>> b/drivers/gpu/drm/i915/display/intel_bw.c
>> index
>> 048be287224774110d94fe2944daa580d8dc20a6..6f805af32926d
t;> DISPLAY_VER(__display) >= 14)
>> +#define HAS_AS_SDP(__display)(DISPLAY_VER(__display) >= 13)
>> #define HAS_ASYNC_FLIPS(__display)(DISPLAY_VER(__display) >= 5)
>
>Y comes before _ in asciibetical order.
Maybe that's just me, but
here.
>
> * igt@kms_force_connector_basic@force-edid:
>- fi-kbl-8809g: NOTRUN -> [DMESG-FAIL][9]
> [9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11v5/fi-kbl-8809g/igt@kms_force_connector_ba...@force-edid.html
>
And amdgpu in the logs here as well.
--
Gustavo Sousa
Quoting Ville Syrjälä (2025-03-10 13:37:15-03:00)
>On Mon, Mar 10, 2025 at 03:12:43PM +0200, Jani Nikula wrote:
>> On Fri, 07 Mar 2025, Gustavo Sousa wrote:
>> > Bandwidth parameters for Xe3_LPD have been updated with respect to
>> > previous display releases. Encode t
v2:
https://lore.kernel.org/r/20250217153550.43909-1-gustavo.so...@intel.com
Changes in v4:
- Prefer intel_uncore_read() for MCHBAR registers. (Ville)
- Link to v3:
https://lore.kernel.org/r/20250307-xe3lpd-bandwidth-update-v3-0-58bbe81f6...@intel.com
---
Gustavo Sousa (3):
drm/i915/displa
Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.
Bspec: 68859
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++-
1 file changed
Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.
Bspec: 68859
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++-
1 file changed
We already have internal interface for intel_bw.c converted to use
intel_display. Now convert the external interface as well.
Reviewed-by: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c| 25 +-
drivers/gpu/drm/i915/display
.h anymore. (Ville)
- Link to v4:
https://lore.kernel.org/r/20250310-xe3lpd-bandwidth-update-v4-0-4191964b0...@intel.com
---
Gustavo Sousa (3):
drm/i915/display: Convert intel_bw.c internally to intel_display
drm/i915/display: Convert intel_bw.c externally to intel_display
drm/i915/xe3l
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 416 +---
1 file changed, 217 insertions(+), 199 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index
We already have internal interface for intel_bw.c converted to use
intel_display. Now convert the external interface as well.
Reviewed-by: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c| 25 +-
drivers/gpu/drm/i915/display
Quoting Ville Syrjälä (2025-03-11 13:46:25-03:00)
>On Mon, Mar 10, 2025 at 03:57:58PM -0300, Gustavo Sousa wrote:
>> Update intel_bw.c internally use intel_display. Conversion of the public
>> interface will come as a follow-up.
>>
>> v2:
>> - Prefer intel_u
Quoting Jani Nikula (2025-03-11 06:26:32-03:00)
>On Mon, 10 Mar 2025, Gustavo Sousa wrote:
>> Quoting Ville Syrjälä (2025-03-10 13:47:57-03:00)
>>>On Fri, Mar 07, 2025 at 04:25:11PM -0300, Gustavo Sousa wrote:
>>>> Update intel_bw.c internally use intel_dis
Quoting Kai Vehmanen (2025-02-28 06:40:51-03:00)
>Hi,
>
>On Thu, 27 Feb 2025, Gustavo Sousa wrote:
>
>> In Xe3_LPD, display audio has the core audio logic located in PG0 and
>> per-transcoder logic in the same power well that provides power for the
>> t
Update intel_bw.c internally use intel_display. Conversion of the public
interface will come as a follow-up.
v2:
- Prefer intel_uncore_read() for MCHBAR registers. (Ville)
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 417
Quoting Ville Syrjälä (2025-03-10 13:47:57-03:00)
>On Fri, Mar 07, 2025 at 04:25:11PM -0300, Gustavo Sousa wrote:
>> Update intel_bw.c internally use intel_display. Conversion of the public
>> interface will come as a follow-up.
>>
>> Cc: Ville Syrjälä
>
ms_flip@plain-flip-ts-check@d-hdmi-a3:
>- shard-dg2: NOTRUN -> [FAIL][2]
> [2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145593v2/shard-dg2-7/igt@kms_flip@plain-flip-ts-ch...@d-hdmi-a3.html
This maps to
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734 .
--
Gustavo Sousa
Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.
Bspec: 68859
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++-
1 file changed
We already have internal interface for intel_bw.c converted to use
intel_display. Now convert the external interface as well.
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c| 25 +-
drivers/gpu/drm/i915/display
Update intel_bw.c internally use intel_display. Conversion of the public
interface will come as a follow-up.
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 416 +---
1 file changed, 217 insertions(+), 199 deletions
v2:
https://lore.kernel.org/r/20250217153550.43909-1-gustavo.so...@intel.com
---
Gustavo Sousa (3):
drm/i915/display: Convert intel_bw.c internally to intel_display
drm/i915/display: Convert intel_bw.c externally to intel_display
drm/i915/xe3lpd: Update bandwidth parameters
drive
Quoting Gustavo Sousa (2025-02-27 18:09:11-03:00)
>Fix one issue[1] reported by the kernel test robot and also take this
>opportunity to improve POWER_DOMAIN_*() macros by making them explicitly
>return the expected enum type with patch #2.
>
>I decided to send this new versio
s://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734 .
>
> * igt@perf_pmu@module-unload:
>- shard-tglu-1: NOTRUN -> [INCOMPLETE][7]
> [7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144726v4/shard-tglu-1/igt@perf_...@module-unload.html
Possibly related to
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13029 .
--
Gustavo Sousa
Quoting Gustavo Sousa (2025-02-28 11:08:35-03:00)
>Quoting Patchwork (2025-02-28 04:25:37-03:00)
>>== Series Details ==
>>
>>Series: drm/i915/audio: Extend Wa_14020863754 to Xe3_LPD (rev2)
>>URL : https://patchwork.freedesktop.org/series/145492/
>>State : failu
d-snb6/igt@kms_flip@wf_vblank-ts-ch...@b-vga1.html
None of those are related to this series. The effective functional
change is the addition of the workaround for Xe3_LPD, which is not
present in any of the platforms above.
--
Gustavo Sousa
rjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_display_power.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
b/drivers/gpu/drm/i915/display/intel_display_power.h
Whoops... This should've been v4. Let's see how Patchwork and CI will
react.
--
Gustavo Sousa
Quoting Gustavo Sousa (2025-02-27 18:09:11-03:00)
>Fix one issue[1] reported by the kernel test robot and also take this
>opportunity to improve POWER_DOMAIN_*() macros by making them ex
reviewed patches #1 and #2. Patch #3
from the previous version is still under discussion and will probably be
respinned as a standalone patch.
[1] https://lore.kernel.org/oe-kbuild-all/202502120809.xfmcqkbd-...@intel.com/
---
Gustavo Sousa (2):
drm/i915/display: Use explicit base values in
iewed-by: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_display_power.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
b/drivers/gpu/drm/i915/display/intel_displa
to avoid applying the workaround to some variant of the IP that could
theoretically appear in the future (which is likely to have a different
minor release number), since the issue addressed by the workaround could
be fixed in such new release.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915
This is v2 of the series to extend Wa_14020863754 to Xe3_LPD.
The initial version was just a single patch. Now this is a 2-patch
series, where the first patch converts needs_wa_14020863754() to always
check IP versions.
Signed-off-by: Gustavo Sousa
---
Changes in v2:
- Add a patch convert
Workaround Wa_14020863754 also applies to Xe3_LPD. Update
needs_wa_14020863754() accordingly.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_audio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers
y new in
Xe3_LPD. This is also true for previous display generations. We need
to figure out the correct version where this split happened so that
we can apply fixes in the current power domain mapping.
Bspec: 72519
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_dis
Quoting Matt Roper (2025-02-26 19:26:13-03:00)
>On Wed, Feb 26, 2025 at 11:08:46AM -0300, Gustavo Sousa wrote:
>> Workaround Wa_14020863754 also applies to Xe3_LPD. Update
>> needs_wa_14020863754() accordingly.
>
>It looks like this might also be needed for Xe2_HPD (version
Workaround Wa_14020863754 also applies to Xe3_LPD. Update
needs_wa_14020863754() accordingly.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers/gpu
Quoting Ville Syrjälä (2025-02-17 17:46:27-03:00)
>On Mon, Feb 17, 2025 at 05:34:28PM -0300, Gustavo Sousa wrote:
>> We already have other functions to get power domain for other things
>> (i.e. intel_display_power_*_domain()). Convert POWER_DOMAIN_*() macros
>> to the sam
In the hope of contributing to type safety in our code, let's ensure
that the type returned by the POWER_DOMAIN_*() macros is always of type
enum intel_display_power_domain.
v2:
- Remove accidental +1 in definition of POWER_DOMAIN_PIPE(). (Jani)
Cc: Jani Nikula
Signed-off-by: Gustavo
We already have other functions to get power domain for other things
(i.e. intel_display_power_*_domain()). Convert POWER_DOMAIN_*() macros
to the same standard.
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
Note: Maybe this patch could be squashed with the previous one.
drivers/gpu/drm
at to reviewers to provide
their input.
[1] https://lore.kernel.org/oe-kbuild-all/202502120809.xfmcqkbd-...@intel.com/
Gustavo Sousa (3):
drm/i915/display: Use explicit base values in POWER_DOMAIN_*() macros
drm/i915/display: Make POWER_DOMAIN_*() always result in enum
intel_display_power_domain
d-...@intel.com/
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_display_power.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h
b/drivers/gpu/drm/i915/display/intel_display_power.h
index a3a5c1be8ba
Quoting Ville Syrjälä (2025-02-17 14:44:39-03:00)
>On Mon, Feb 17, 2025 at 12:35:23PM -0300, Gustavo Sousa wrote:
>> Update intel_bw.c to use a "display" variable to refer to members of the
>> display struct. While this change does not move that file to completely
>&
Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.
Bspec: 68859
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++-
1 file changed, 10 insertions(+), 1
Update intel_bw.c to use a "display" variable to refer to members of the
display struct. While this change does not move that file to completely
use struct intel_display as part of it's internal and public interface,
this should help with a future transition.
Signed-off-by
about.
v2:
- Fix typo in patch #2.
Gustavo Sousa (3):
drm/i915/display: Use display variable in intel_bw.c
drm/i915/display: Use display-specific platform checks in intel_bw.c
drm/i915/xe3lpd: Update bandwidth parameters
drivers/gpu/drm/i915/display/intel_bw.c | 192
Add one step further into making intel_bw.c xe/i915 agnostic by using
display-specific platform checks.
v2:
- Fix typo that resulted in converting IS_DG1(display) to
display->platform.dg2.
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c |
Quoting Ville Syrjälä (2025-02-12 15:55:59-03:00)
>On Wed, Feb 12, 2025 at 03:44:26PM -0300, Gustavo Sousa wrote:
>> Quoting Gustavo Sousa (2025-02-12 14:59:28-03:00)
>> >Quoting Ville Syrjälä (2025-02-12 14:52:19-03:00)
>> >>On Wed, Feb 12, 2025 at 02:43:1
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