[Intel-gfx] [PATCH] drm/i915/selftests: Follow up on increase timeout in i915_gem_contexts selftests

2021-12-06 Thread Bruce Chang
Follow up on commit 5e076529e265 ("drm/i915/selftests: Increase timeout in i915_gem_contexts selftests") So we went from 200 msec to 1sec in that commit, and now we are going to 10sec as timeout. Signed-off-by: Bruce Chang Reviewed-by: Matthew Brost Cc: John Harrison --- drivers/gp

[Intel-gfx] [PATCH] drm/i915/selftests: Follow up on increase timeout in i915_gem_contexts selftests

2021-12-03 Thread Bruce Chang
Follow up on patch https://patchwork.freedesktop.org/patch/446832/ Different platforms will take a bit longer while GuC is enabled, so increase the timeout and also add some margin in i915_gem_context selftest. Signed-off-by: Bruce Chang Cc: Matthew Brost Cc: John Harrison --- drivers/gpu

Re: [Intel-gfx] [CI] drm/i915: Disable atomics in L3 for gen9

2021-05-29 Thread J. Bruce Fields
On Sat, May 29, 2021 at 07:29:12AM +0200, Greg KH wrote: > On Fri, May 28, 2021 at 01:25:43PM -0400, J. Bruce Fields wrote: > > Would it be possible to apply > > > > 58586680ffad "drm/i915: Disable atomics in L3 for gen9" > > > > to stable kernels?

[Intel-gfx] [CI] drm/i915: Disable atomics in L3 for gen9

2021-05-28 Thread J. Bruce Fields
Would it be possible to apply 58586680ffad "drm/i915: Disable atomics in L3 for gen9" to stable kernels? I'm finding it quite easy to crash my Thinkpad X1 Carbon 6th gen with Blender on Fedora 34 (which is using the 5.11.y kernels). It applies cleanly, and I've been running 5.11.16 with

Re: [Intel-gfx] [PATCH] drm/i915/selftest: Synchronise with the GPU timestamp

2021-02-04 Thread Chang, Yu bruce
> Wait for the GPU to wake up from the semaphore before measuring the >time, so that we coordinate the sampling on both the CPU and GPU for > more accurate comparisons. > >Reported-by: Bruce Chang > Signed-off-by: Chris Wilson > Cc: CQ Tang > --- > drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH i-g-t] lib: Pass device fd to gem_mmappable_aperture_size()

2020-12-14 Thread Chang, Yu bruce
>From: Chris Wilson > >Sent: Monday, December 14, 2020 2:15 PM >To: Chang, Yu bruce; intel-gfx@lists.freedesktop.org >Subject: Re: [Intel-gfx] [PATCH i-g-t] lib: Pass device fd to >gem_mmappable_aperture_size() > >Quoting Chang, Yu bruce (2020-12-14 21:52:10) >&g

Re: [Intel-gfx] [PATCH i-g-t] lib: Pass device fd to gem_mmappable_aperture_size()

2020-12-14 Thread Chang, Yu bruce
> >From: Chris Wilson >Sent: Monday, December 14, 2020 12:48 PM >To: Chang, Yu bruce; intel-gfx@lists.freedesktop.org >Cc: igt-dev@ >Subject: Re: [Intel-gfx] [PATCH i-g-t] lib: Pass device fd to >gem_mmappable_aperture_size() > >Quoting Chang, Yu

Re: [Intel-gfx] [PATCH i-g-t] lib: Pass device fd to gem_mmappable_aperture_size()

2020-12-14 Thread Chang, Yu bruce
Some minor comments as below. Reviewed-by: Bruce Chang From: Chris Wilson Sent: Saturday, December 12, 2020 1:43 AM To: intel-gfx@lists.freedesktop.org Cc: igt-...@lists.freedesktop.org; Chris Wilson; Chang, Yu bruce Subject: [PATCH i-g-t] lib: Pass device fd

Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: Wait for CSB entries on Tigerlake

2020-08-14 Thread Chang, Bruce
On 8/14/2020 5:36 PM, Chang, Bruce wrote: @@ -2498,9 +2498,22 @@ invalidate_csb_entries(const u64 *first, const u64 *last)     */    static inline bool gen12_csb_parse(const u64 *csb)    { - u64 entry = READ_ONCE(*csb); - bool ctx_away_valid = GEN12_CSB_CTX_VALID(upper_32_bits(entry

Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: Wait for CSB entries on Tigerlake

2020-08-14 Thread Chang, Bruce
@@ -2498,9 +2498,22 @@ invalidate_csb_entries(const u64 *first, const u64 *last) */ static inline bool gen12_csb_parse(const u64 *csb) { - u64 entry = READ_ONCE(*csb); - bool ctx_away_valid = GEN12_CSB_CTX_VALID(upper_32_bits(entry)); - bool new_queue = + bool ctx_away

Re: [Intel-gfx] [PATCH 3/3] drm/i915/gt: Apply the CSB w/a for all

2020-08-14 Thread Chang, Bruce
was not covered by our previous w/a. References: d8f505311717 ("drm/i915/icl: Forcibly evict stale csb entries") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Bruce Chang --- drivers/gpu/drm/i915/gt/intel_lrc.c | 70 + 1 file changed, 42 inserti

Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: Wait for CSB entries on Tigerlake

2020-08-14 Thread Chang, Bruce
sly saw on Icelake (though it might be best if we try the same approach there as well and measure), and Bruce suggested the good idea of resetting the CSB entry after use so that we can detect when it has been updated by the GPU. By instrumenting how long that may be, we can set a reliable upper bound fo

Re: [Intel-gfx] [PATCH] drm/i915/gt: Incrementally check for rewinding

2020-06-09 Thread Chang, Bruce
Cc: # v5.4+ Verified this has fixed the issue regarding the GPU hang with incomplete error state. reviewed by: Bruce Chang --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 +- drivers/gpu/drm/i915/gt/intel_lrc.c | 21 +++- drivers/gpu/drm/i915/gt/intel_ring.c

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
mic context but after that, compress_page calls pool_alloc with GFP_KERNEL flag which can potentially go to sleep. In order to fix this issue, we either 1) not enter into atomic context, i.e., to use non atomic version of functions like io_mapping_map_wc/kmap, or

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
to use non atomic version of functions like io_mapping_map_wc/kmap, or 2) make compress_page run in atomic context. But it is not a good idea to run slow compression in atomic context, so, 1) above is preferred solution which is the implementation of this patch. Signed-off

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
ERNEL flag which can go to sleep. This is why the bug got reported. So, changed to non atomic version instead. Signed-off-by: Bruce Chang Reviewed-by: Brian Welty Fixes: 895d8ebeaa924 ("drm/i915: error capture with no ggtt slot") --- drivers/gpu/drm/i915/i915_gpu_error.c | 8 ---

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-12 Thread Bruce Chang
ERNEL flag which can go to sleep. This is why the bug got reported. So, changed to non atomic version instead. Signed-off-by: Bruce Chang --- drivers/gpu/drm/i915/i915_gpu_error.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c

Re: [Intel-gfx] [PATCH 00/18] use ARRAY_SIZE macro

2017-10-05 Thread J. Bruce Fields
On Mon, Oct 02, 2017 at 09:33:12PM -0400, Jérémy Lefaure wrote: > On Mon, 2 Oct 2017 15:22:24 -0400 > bfie...@fieldses.org (J. Bruce Fields) wrote: > > > Mainly I'd just like to know which you're asking for. Do you want me to > > apply this, or to ACK it so someo

Re: [Intel-gfx] [PATCH 00/18] use ARRAY_SIZE macro

2017-10-02 Thread J. Bruce Fields
On Mon, Oct 02, 2017 at 07:35:54AM +0200, Greg KH wrote: > On Sun, Oct 01, 2017 at 08:52:20PM -0400, Jérémy Lefaure wrote: > > On Mon, 2 Oct 2017 09:01:31 +1100 > > "Tobin C. Harding" wrote: > > > > > > In order to reduce the size of the To: and Cc: lines, each patch of the > > > > series is sent

[Intel-gfx] Multiple Instances of h264encode: Corruption and Cross-process interference

2014-02-13 Thread Bruce
*System from vainfo* *libva info: VA-API version 0.34.0* *libva info: va_getDriverName() returns 0* *libva info: Trying to open /usr/local/lib/dri/i965_drv_video.so* *libva info: Found init function __vaDriverInit_0_34* *libva info: va_openDriver() returns 0* *vainfo: VA-API version: 0.34 (