[PATCH v4 11/11] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 + drivers/gpu/drm

[PATCH v4 09/11] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion

[PATCH v4 10/11] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c

[PATCH v4 08/11] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm

[PATCH v4 07/11] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 79

[PATCH v4 06/11] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v4 03/11] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd

[PATCH v4 05/11] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v4 04/11] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v4 01/11] mtd: core: always create master device

Create master device without partition when CONFIG_MTD_PARTITIONED_MASTER flag is unset. This streamlines device tree and allows to anchor runtime power management on master device in all cases. Signed-off-by: Alexander Usyskin --- drivers/mtd/mtdcore.c | 123

[PATCH v4 02/11] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7

[PATCH v4 00/11] mtd: add driver for Intel discrete graphics

dd more Rodrigo's r-b and Miquel's ack. V4: Add patch that always creates mtd master device and adjust mtd-intel-dg power management to use this device. Alexander Usyskin (11): mtd: core: always create master device mtd: add driver for intel graphics non-volatile memory devic

[PATCH v3 10/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 + drivers/gpu/drm

[PATCH v3 09/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c

[PATCH v3 06/10] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 70

[PATCH v3 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v3 08/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion

[PATCH v3 07/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm

[PATCH v3 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v3 04/10] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v3 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v3 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7

[PATCH v3 00/10] mtd: add driver for Intel discrete graphics

dd more Rodrigo's r-b and Miquel's ack. Alexander Usyskin (10): mtd: add driver for intel graphics non-volatile memory device mtd: intel-dg: implement region enumeration mtd: intel-dg: implement access functions mtd: intel-dg: register with mtd mtd: intel-dg: align 64bit read and

[PATCH v2 08/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm

[PATCH v2 07/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Rodrigo Vivi CC: Lucas De Marchi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915

[PATCH v2 10/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 + drivers/gpu/drm/xe/xe_nvm.c | 32

[PATCH v2 09/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c

[PATCH v2 06/10] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 73 +- 1 file changed

[PATCH v2 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 35 ++ 1 file changed, 35 insertions(+) diff --git a/drivers

[PATCH v2 04/10] mtd: intel-dg: register with mtd

Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/devices/mtd-intel

[PATCH v2 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 197

[PATCH v2 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 199

[PATCH v2 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7 ++ drivers/mtd/devices

[PATCH v2 00/10] mtd: add driver for Intel discrete graphics

ice on Battlemage HW (xe driver patch) Fix overwrite register address (xe driver patch) Add Rodrigo's r-b Alexander Usyskin (10): mtd: add driver for intel graphics non-volatile memory device mtd: intel-dg: implement region enumeration mtd: intel-dg: implement access functions

[PATCH 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Rodrigo Vivi CC: Lucas De Marchi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7 ++ drivers/mtd/devices/Kconfig

[PATCH 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 199

[PATCH 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 199

[PATCH 10/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe/xe_nvm.c | 33

[PATCH 07/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Rodrigo Vivi CC: Lucas De Marchi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915

[PATCH 09/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 + drivers/gpu/drm/xe

[PATCH 06/10] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 73 +- 1 file changed

[PATCH 08/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/gpu

[PATCH 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 35 ++ 1 file changed, 35 insertions(+) diff --git a/drivers

[PATCH 04/10] mtd: intel-dg: register with mtd

Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/devices/mtd-intel

[PATCH 00/10] mtd: add driver for Intel discrete graphics

river for Intel discrete graphics" series with connection to the Xe driver and splitting the spi driver part to separate module in mtd subsystem. This series intended to be pushed through drm-xe-next. Alexander Usyskin (10): mtd: add driver for intel graphics non-volatile memory de

[PATCH v6 09/12] drm/i915/spi: add intel_spi_region map

From: Tomas Winkler Add the dGFX spi region map and convey it via auxiliary device to the spi child device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 8 1 file changed, 8 insertions

[PATCH v6 10/12] drm/i915/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 25 + 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/spi

[PATCH v6 12/12] drm/xe/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe/xe_spi.c | 33

[PATCH v6 11/12] drm/xe/spi: add on-die spi device

Enable access to internal spi on DGFX with GSC/CSC devices via a child device. The spi child device is exposed via auxiliary bus. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 + drivers/gpu/drm/xe/xe_device_types.h

[PATCH v6 08/12] drm/i915/spi: add spi device for discrete graphics

From: Tomas Winkler Enable access to internal spi on DGFX devices via a child device. The spi child device is exposed via auxiliary bus. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/Makefile| 4

[PATCH v6 07/12] spi: intel-dg: wake card on operations

Enable runtime PM in spi driver to notify graphics driver that whole card should be kept awake while spi operations are performed through this driver. CC: Lucas De Marchi Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 44 ++ 1 file changed

[PATCH v6 06/12] spi: intel-dg: align 64bit read and write

GSC SPI HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/drivers/spi/spi-intel

[PATCH v6 05/12] spi: intel-dg: implement mtd access handlers

-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 152 +++-- 1 file changed, 147 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-intel-dg.c b/drivers/spi/spi-intel-dg.c index a936014f1a76..dfb457c43a5d 100644 --- a/drivers/spi/spi-intel-dg.c

[PATCH v6 04/12] spi: intel-dg: spi register with mtd

From: Tomas Winkler Register the on-die spi device with the mtd subsystem. Refcount spi object on _get and _put mtd callbacks. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 111

[PATCH v6 03/12] spi: intel-dg: implement spi access functions

From: Tomas Winkler Implement spi_read(), spi_erase() and spi_write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Signed-off-by: Tomas Winkler Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 199 + 1

[PATCH v6 02/12] spi: intel-dg: implement region enumeration

From: Tomas Winkler In intel-dg spi, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 190

[PATCH v6 01/12] spi: add driver for intel graphics on-die spi device

Add auxiliary driver for intel discrete graphics on-die spi device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS | 7 ++ drivers/spi/Kconfig | 11 +++ drivers/spi/Makefile

[PATCH v6 00/12] spi: add driver for Intel discrete graphics

cards have such spi Alexander Usyskin (6): spi: add driver for intel graphics on-die spi device spi: intel-dg: align 64bit read and write spi: intel-dg: wake card on operations drm/i915/spi: add support for access mode drm/xe/spi: add on-die spi device drm/xe/spi: add support for access m

[PATCH v5 12/12] drm/xe/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe/xe_spi.c | 33

[PATCH v5 11/12] drm/xe/spi: add on-die spi device

Enable access to internal spi on DGFX with GSC/CSC devices via a child device. The spi child device is exposed via auxiliary bus. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 + drivers/gpu/drm/xe/xe_device_types.h

[PATCH v5 10/12] drm/i915/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 25 + 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/spi

[PATCH v5 09/12] drm/i915/spi: add intel_spi_region map

From: Tomas Winkler Add the dGFX spi region map and convey it via auxiliary device to the spi child device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 8 1 file changed, 8 insertions

[PATCH v5 08/12] drm/i915/spi: add spi device for discrete graphics

From: Tomas Winkler Enable access to internal spi on DGFX devices via a child device. The spi child device is exposed via auxiliary bus. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/Makefile| 4

[PATCH v5 07/12] spi: intel-dg: wake card on operations

Enable runtime PM in spi driver to notify graphics driver that whole card should be kept awake while spi operations are performed through this driver. CC: Lucas De Marchi Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 44 ++ 1 file changed

[PATCH v5 06/12] spi: intel-dg: align 64bit read and write

GSC SPI HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/drivers/spi/spi-intel

[PATCH v5 05/12] spi: intel-dg: implement mtd access handlers

-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 152 +++-- 1 file changed, 147 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-intel-dg.c b/drivers/spi/spi-intel-dg.c index a936014f1a76..dfb457c43a5d 100644 --- a/drivers/spi/spi-intel-dg.c

[PATCH v5 04/12] spi: intel-dg: spi register with mtd

From: Tomas Winkler Register the on-die spi device with the mtd subsystem. Refcount spi object on _get and _put mtd callbacks. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 111

[PATCH v5 03/12] spi: intel-dg: implement spi access functions

From: Tomas Winkler Implement spi_read(), spi_erase() and spi_write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Signed-off-by: Tomas Winkler Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 199 + 1

[PATCH v5 02/12] spi: intel-dg: implement region enumeration

From: Tomas Winkler In intel-dg spi, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 190

[PATCH v5 01/12] spi: add driver for intel graphics on-die spi device

Add auxiliary driver for intel discrete graphics on-die spi device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS | 7 ++ drivers/spi/Kconfig | 11 +++ drivers/spi/Makefile

[PATCH v5 00/12] spi: add driver for Intel discrete graphics

add check for discrete graphics missed in i915 intel_spi_fini V3: rebase over drm-xe-next to enable CI run V2: fix review comments fix signatures order depend spi presence in Xe on special flag, as not all new discrete cards have such spi Alexander Usyskin (6): spi: add driver

[PATCH v4 12/12] drm/xe/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe/xe_spi.c | 33

[PATCH v4 11/12] drm/xe/spi: add on-die spi device

Enable access to internal spi on DGFX with GSC/CSC devices via a child device. The spi child device is exposed via auxiliary bus. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 ++ drivers/gpu/drm/xe/xe_device_types.h

[PATCH v4 10/12] drm/i915/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 25 + 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/spi

[PATCH v4 09/12] drm/i915/spi: add intel_spi_region map

From: Tomas Winkler Add the dGFX spi region map and convey it via auxiliary device to the spi child device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 8 1 file changed, 8 insertions

[PATCH v4 08/12] drm/i915/spi: add spi device for discrete graphics

From: Tomas Winkler Enable access to internal spi on DGFX devices via a child device. The spi child device is exposed via auxiliary bus. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/Makefile| 4

[PATCH v4 07/12] spi: intel-dg: wake card on operations

Enable runtime PM in spi driver to notify graphics driver that whole card should be kept awake while spi operations are performed through this driver. CC: Lucas De Marchi Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 44 ++ 1 file changed

[PATCH v4 05/12] spi: intel-dg: implement mtd access handlers

-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 152 +++-- 1 file changed, 147 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-intel-dg.c b/drivers/spi/spi-intel-dg.c index a936014f1a76..dfb457c43a5d 100644 --- a/drivers/spi/spi-intel-dg.c

[PATCH v4 06/12] spi: intel-dg: align 64bit read and write

GSC SPI HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/drivers/spi/spi-intel

[PATCH v4 03/12] spi: intel-dg: implement spi access functions

From: Tomas Winkler Implement spi_read(), spi_erase() and spi_write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Signed-off-by: Tomas Winkler Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 199 + 1

[PATCH v4 04/12] spi: intel-dg: spi register with mtd

From: Tomas Winkler Register the on-die spi device with the mtd subsystem. Refcount spi object on _get and _put mtd callbacks. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 111

[PATCH v4 02/12] spi: intel-dg: implement region enumeration

From: Tomas Winkler In intel-dg spi, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 190

[PATCH v4 01/12] spi: add driver for intel graphics on-die spi device

Add auxiliary driver for intel discrete graphics on-die spi device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS | 7 ++ drivers/spi/Kconfig | 11 +++ drivers/spi/Makefile

[PATCH v4 00/12] spi: add driver for Intel discrete graphics

w comments fix signatures order depend spi presence in Xe on special flag, as not all new discrete cards have such spi Alexander Usyskin (6): spi: add driver for intel graphics on-die spi device spi: intel-dg: align 64bit read and write spi: intel-dg: wake card on operations drm/i91

[PATCH v3 12/12] drm/xe/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 5 drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe/xe_spi.c | 33

[PATCH v3 11/12] drm/xe/spi: add on-die spi device

Enable access to internal spi on DGFX with GSC/CSC devices via a child device. The spi child device is exposed via auxiliary bus. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 ++ drivers/gpu/drm/xe/xe_device_types.h

[PATCH v3 10/12] drm/i915/spi: add support for access mode

Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 25 + 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/spi

[PATCH v3 09/12] drm/i915/spi: add intel_spi_region map

From: Tomas Winkler Add the dGFX spi region map and convey it via auxiliary device to the spi child device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 8 1 file changed, 8 insertions

[PATCH v3 08/12] drm/i915/spi: add spi device for discrete graphics

From: Tomas Winkler Enable access to internal spi on DGFX devices via a child device. The spi child device is exposed via auxiliary bus. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/Makefile| 4

[PATCH v3 07/12] spi: intel-dg: wake card on operations

Enable runtime PM in spi driver to notify graphics driver that whole card should be kept awake while spi operations are performed through this driver. CC: Lucas De Marchi Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 44 ++ 1 file changed

[PATCH v3 06/12] spi: intel-dg: align 64bit read and write

GSC SPI HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 35 +++ 1 file changed, 35 insertions(+) diff --git a/drivers/spi/spi-intel

[PATCH v3 05/12] spi: intel-dg: implement mtd access handlers

-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 152 +++-- 1 file changed, 147 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-intel-dg.c b/drivers/spi/spi-intel-dg.c index 2ffc2d61fdc8..dc4d6c573522 100644 --- a/drivers/spi/spi-intel-dg.c

[PATCH v3 04/12] spi: intel-dg: spi register with mtd

From: Tomas Winkler Register the on-die spi device with the mtd subsystem. Refcount spi object on _get and _put mtd callbacks. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 111

[PATCH v3 03/12] spi: intel-dg: implement spi access functions

From: Tomas Winkler Implement spi_read(), spi_erase() and spi_write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Signed-off-by: Tomas Winkler Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 199 + 1

[PATCH v3 02/12] spi: intel-dg: implement region enumeration

From: Tomas Winkler In intel-dg spi, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 190

[PATCH v3 01/12] spi: add driver for intel graphics on-die spi device

Add auxiliary driver for intel discrete graphics on-die spi device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS | 7 ++ drivers/spi/Kconfig | 11 +++ drivers/spi/Makefile

[PATCH v3 00/12] spi: add driver for Intel discrete graphics

ot all new discrete cards have such spi Alexander Usyskin (6): spi: add driver for intel graphics on-die spi device spi: intel-dg: align 64bit read and write spi: intel-dg: wake card on operations drm/i915/spi: add support for access mode drm/xe/spi: add on-die spi device drm/xe/spi: a

[PATCH v2 11/12] drm/xe/spi: add on-die spi device

Enable access to internal spi on DGFX with GSC/CSC devices via a child device. The spi child device is exposed via auxiliary bus. Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c | 3 ++ drivers/gpu/drm/xe/xe_device_types.h

[PATCH v2 09/12] drm/i915/spi: add intel_spi_region map

From: Tomas Winkler Add the dGFX spi region map and convey it via auxiliary device to the spi child device. CC: Rodrigo Vivi CC: Lucas De Marchi Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/spi/intel_spi.c | 8 1 file changed, 8 insertions

[PATCH v2 05/12] spi: intel-dg: implement mtd access handlers

-off-by: Alexander Usyskin --- drivers/spi/spi-intel-dg.c | 152 +++-- 1 file changed, 147 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-intel-dg.c b/drivers/spi/spi-intel-dg.c index 2ffc2d61fdc8..dc4d6c573522 100644 --- a/drivers/spi/spi-intel-dg.c

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