On 3/24/2025 11:32 PM, Ville Syrjälä wrote:
On Mon, Mar 24, 2025 at 07:02:47PM +0530, Ankit Nautiyal wrote:
Introduce helpers to get and set TRANS_VTOTAL registers.
This will pave way to avoid reading/writing VTOTAL.Vtotal bits for
platforms that always use VRR timing generator.
Signed-off-by
Hello Nicolin,
Hope you are doing well. I am Chaitanya from the linux graphics team in Intel.
This mail is regarding a regression we are seeing in our CI runs[1] on
linux-next repository.
Since the version next-20250321 [2], we are seeing the following regression
``
On 3/24/2025 11:12 PM, Ville Syrjälä wrote:
On Mon, Mar 24, 2025 at 07:02:34PM +0530, Ankit Nautiyal wrote:
Currently the variable timings are supported only for DP and eDP and not
for DP MST. Call intel_vrr_compute_config() for MST which will configure
fixed refresh rate timings irrespective
Le lun. 24 mars 2025 à 13:54, Jani Nikula
a écrit :
>
> On Sun, 23 Mar 2025, Damian Tometzki wrote:
> > On Mon, 10. Mar 15:23, Kees Cook wrote:
> >> When a character array without a terminating NUL character has a static
> >> initializer, GCC 15's -Wunterminated-string-initialization will only
>
== Series Details ==
Series: drm/i915: DRAM type logging
URL : https://patchwork.freedesktop.org/series/146701/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16311 -> Patchwork_146701v1
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915: DRAM type logging
URL : https://patchwork.freedesktop.org/series/146701/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Some new dram types were added without adding the corresponding string
conversion, probably because it's not being used by recent platforms.
Add them, together with a BUILD_BUG_ON() to ensure it keeps in sync, in
preparation to make use of them in recent platforms.
Signed-off-by: Lucas De Marchi
Instead of logging the dram type in the per version/platform function,
do it in the generic one. This fixes a few discrepancies depending on
the platform:
- There was no DRAM type logging for graphics version 12 and
above
- For graphics version 11, it would log the DRAM t
/intel_dram.c | 17 -
drivers/gpu/drm/xe/xe_device_types.h | 1 +
3 files changed, 14 insertions(+), 5 deletions(-)
base-commit: 9a42bdcde0f77b2c1e947e283cc3b267b1ce2056
change-id: 20250324-dram-type-e7c74461c670
Lucas De Marchi
On Mon, Mar 24, 2025 at 01:02:07PM -0700, Matt Roper wrote:
On Mon, Mar 24, 2025 at 10:22:33AM -0700, Lucas De Marchi wrote:
From: Vivek Kasireddy
Some SKUs of Xe2_HPD platforms (such as BMG) have GDDR memory type
with ECC enabled. We need to identify this scenario and add a new
case in xelpdp
On Mon, Mar 24, 2025 at 10:22:33AM -0700, Lucas De Marchi wrote:
> From: Vivek Kasireddy
>
> Some SKUs of Xe2_HPD platforms (such as BMG) have GDDR memory type
> with ECC enabled. We need to identify this scenario and add a new
> case in xelpdp_get_dram_info() to handle it. In addition, the
> der
== Series Details ==
Series: drm/i915: sagv/bw cleanup (rev3)
URL : https://patchwork.freedesktop.org/series/146014/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/146014/revisions/3/mbox/ not
applied
Applying: drm/i915: Drop the cached per-pipe m
== Series Details ==
Series: drm/i915: Pimp the initial FB readout (rev2)
URL : https://patchwork.freedesktop.org/series/146258/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
This looks all good to me, do you need someone to push this to drm-misc?
On Mon, 2025-03-24 at 13:51 +0200, Dmitry Baryshkov wrote:
> Existing DPCD access functions return an error code or the number of
> bytes being read / write in case of partial access. However a lot of
> drivers either (incorr
== Series Details ==
Series: series starting with [1/2] drm/i915: Enable/disable shared dplls just
the once for joined pipes (rev3)
URL : https://patchwork.freedesktop.org/series/146097/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: drm/i915: Fix DP MST DB message timeouts due to PPS delays
URL : https://patchwork.freedesktop.org/series/146680/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16309 -> Patchwork_146680v1
Summar
== Series Details ==
Series: drm/i915: Fix DP MST DB message timeouts due to PPS delays
URL : https://patchwork.freedesktop.org/series/146680/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/incl
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
Classmaps are stored in an elf section/array, but currently are
individually list-linked onto dyndbg's per-module ddebug_table for
operation. This is unnecessary.
Just like dyndbg's descriptors, classes are packed in compile order;
so even with many
== Series Details ==
Series: drm/i915/xe2hpd: Identify the memory type for SKUs with GDDR + ECC
(rev2)
URL : https://patchwork.freedesktop.org/series/144909/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16309 -> Patchwork_144909v2
On Mon, 24 Mar 2025, "Nautiyal, Ankit K" wrote:
> On 3/21/2025 6:07 PM, Mohammed Thasleem wrote:
>> Starting from MTL we don't have a platform agnostic way to validate
>> DC6 state due to dc6 counter has been removed to validate DC state.
>>
>> The goal is to validate that the display HW can reach
On Mon, Mar 24, 2025 at 11:16:30PM +0900, Vincent Mailhol wrote:
> On 24/03/2025 at 22:41, Andy Shevchenko wrote:
> > On Sat, Mar 22, 2025 at 06:23:13PM +0900, Vincent Mailhol via B4 Relay
> > wrote:
...
> >> +/*
> >> + * Fixed-type variants of BIT(), with additional checks like
> >> GENMASK_T
On Mon, Mar 24, 2025 at 07:02:46PM +0530, Ankit Nautiyal wrote:
> We now always set vrr.flipline, vmin, and vmax for all platforms that
> support VRR. Therefore, we should set all TRANS_VRR_CTL bits except
> VRR_ENABLE. Without this, the readback for these bits will fail because we
> only read vrr.
The Panel Power Sequencer lock held on an eDP port (a) blocks a DP AUX
transfer on another port (b), since the PPS lock is device global, thus
shared by all ports. The PPS lock can be held on port (a) for a longer
period due to the various PPS delays (panel/backlight on/off,
power-cycle delays). Th
On Mon, Mar 24, 2025 at 07:02:47PM +0530, Ankit Nautiyal wrote:
> Introduce helpers to get and set TRANS_VTOTAL registers.
> This will pave way to avoid reading/writing VTOTAL.Vtotal bits for
> platforms that always use VRR timing generator.
>
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/gpu/
This is v2 of [1], dropping the change to lock PPS and enable VDD from a
separate function, as requested by Jani.
Cc: Jani Nikula
Cc: Ville Syrjälä
[1] https://lore.kernel.org/all/20250321145626.94101-1-imre.d...@intel.com
Imre Deak (2):
drm/i915/pps: Let calling intel_pps_vdd_{on,off}_unloc
After a follow-up change on non-eDP outputs
intel_pps_vdd_{on,off}_unlocked() can be called without the PPS lock
held, allow for this.
Suggested-by: Jani Nikula
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_pps.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
d
On Mon, Mar 24, 2025 at 07:02:34PM +0530, Ankit Nautiyal wrote:
> Currently the variable timings are supported only for DP and eDP and not
> for DP MST. Call intel_vrr_compute_config() for MST which will configure
> fixed refresh rate timings irrespective of whether VRR is supported or
> not. Since
From: Vivek Kasireddy
Some SKUs of Xe2_HPD platforms (such as BMG) have GDDR memory type
with ECC enabled. We need to identify this scenario and add a new
case in xelpdp_get_dram_info() to handle it. In addition, the
derating value needs to be adjusted accordingly to compensate for
the limited ba
On Fri, Mar 21, 2025 at 12:52:44PM +0200, Jani Nikula wrote:
> More conversions to struct intel_display.
>
> Jani Nikula (12):
> drm/i915/dsi: convert vlv_dsi.[ch] to struct intel_display
> drm/i915/dsi: convert vlv_dsi_pll.[ch] to struct intel_display
> drm/i915/dsi: convert parameter print
Store the CCS mode value in the intel_gt->ccs structure to make
it available for future instances that may need to change its
value.
Name it mode_reg_val because it holds the value that will
be written into the CCS_MODE register, determining the CCS
balancing and, consequently, the number of engin
On 3/24/2025 7:02 PM, Ankit Nautiyal wrote:
In intel_post_plane_update() there are things which might need to do
vblank waits, so enabling PSR as early as we do now is simply
counter-productive. Therefore move intel_psr_post_plane_update() at the
last of intel_post_plane_update().
Signed-off-b
We now always set vrr.flipline, vmin, and vmax for all platforms that
support VRR. Therefore, we should set all TRANS_VRR_CTL bits except
VRR_ENABLE. Without this, the readback for these bits will fail because we
only read vrr.flipline, vmin, and vmax if TRANS_VRR_CTL has the
FLIPLINE_EN bit set.
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes (rev17)
URL : https://patchwork.freedesktop.org/series/134383/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16308 -> Patchwork_134383v17
Su
On 25/03/2025 at 01:11, Yury Norov wrote:
> + Anshuman Khandual, Catalin Marinas, linux-arm-ker...@lists.infradead.org
>
> This series moves GENMASK_U128 out of uapi. ARM is the only proposed
> user. Add ARM people for visibility.
Actually, not yet. Here, I am decoupling GENMASK_U128() from
__GEN
On 24/03/2025 at 23:28, Yury Norov wrote:
> On Sat, Mar 22, 2025 at 06:23:11PM +0900, Vincent Mailhol via B4 Relay wrote:
>> Introduce some fixed width variant of the GENMASK() and the BIT()
>> macros in bits.h. Note that the main goal is not to get the correct
>> type, but rather to enforce more c
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes (rev17)
URL : https://patchwork.freedesktop.org/series/134383/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/i
+ Anshuman Khandual, Catalin Marinas, linux-arm-ker...@lists.infradead.org
This series moves GENMASK_U128 out of uapi. ARM is the only proposed
user. Add ARM people for visibility.
Thanks,
Yury
On Sat, Mar 22, 2025 at 07:39:35PM +0900, Vincent Mailhol via B4 Relay wrote:
> This is a subset of be
For the upcoming changes we need a cleaner way to build the list
of uabi engines.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 29 -
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i9
== Series Details ==
Series: drm/i915/display: add audio dis/enable when connector hotplug
URL : https://patchwork.freedesktop.org/series/146667/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16308 -> Patchwork_146667v1
Sum
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Invoke DYNAMIC_DEBUG_CLASSMAP_PARAM to hook drm.debug (__drm_debug) to the
DRM_UT_* classmap, replacing the ad-hoc wiring previously doing it.
Add DRM_CLASSMAP_* adapter macros to selectively use
DYNAMIC_DEBUG_CLASSMAP_* when DRM_USE_DYNAMIC_DEBUG=y
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Describe the 3 API macros providing dynamic_debug's classmaps
DYNDBG_CLASSMAP_DEFINE - create & export a classmap
DYNDBG_CLASSMAP_USE- refer to exported map
DYNDBG_CLASSMAP_PARAM - bind control param to the classmap
DYNDBG_CLASSMAP_PARAM_REF +
== Series Details ==
Series: CCS static load balance
URL : https://patchwork.freedesktop.org/series/146669/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M] drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
dr
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
The Xe driver's XE_IOCTL_DBG macro calls drm_dbg() from inside an if
(expression). This breaks when CONFIG_DRM_USE_DYNAMIC_DEBUG=y because
the invoked macro has a do-while-0 wrapper.
if (cond && (drm_dbg("expr-form"),1)) {
... do some mo
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Treat comma as a token terminator, just like a space. This allows a
user to avoid quoting hassles when spaces are otherwise needed:
:#> modprobe drm dyndbg=class,DRM_UT_CORE,+p\;class,DRM_UT_KMS,+p
or as a boot arg:
drm.dyndbg=class,DRM_UT_CO
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
Add __DYNDBG_CLASSMAP_CHECK to implement these arg-checks at compile:
0 <= _base < 63
class_names is not empty
class_names[0] is a string
(class_names.length + _base) < 63
These compile-time checks will prevent severa
== Series Details ==
Series: series starting with [v2,01/59] vmlinux.lds.h: fixup
HEADERED_SECTION{,_BY} macros
URL : https://patchwork.freedesktop.org/series/14/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/14/revisions/1/mbox/ not
app
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
With CONFIG_DRM_USE_DYNAMIC_DEBUG=y, __drm_printfn_dbg() gets an
unused variable warning/error on 'category', even though the usage
follows immediately, in drm_debug_enabled(category).
For static-key optimized dyndbg, the macro doesn't actually chec
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Following the dyndbg-api-fix, replace DECLARE_DYNDBG_CLASSMAP with
DRM_CLASSMAP_USE. This refs the defined & exported classmap, rather
than re-declaring it redundantly, and error-prone-ly.
This resolves the appearance of "class:_UNKNOWN_" in the co
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
When writing queries to >control, flags are parsed 1st, since they are
the only required field, and they require specific compositions. So
if the flags draw an error (on those specifics), then keyword errors
aren't reported. This can be mildly conf
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Following the dyndbg-api-fix, replace DECLARE_DYNDBG_CLASSMAP with
DRM_CLASSMAP_USE. This refs the defined & exported classmap, rather
than re-declaring it redundantly, and error-prone-ly.
This resolves the appearance of "class:_UNKNOWN_" in the co
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Invoke DRM_CLASSMAP_USE from xe_drm_client.c. When built with
CONFIG_DRM_USE_DYNAMIC_DEBUG=y, this tells dydnbg that Xe uses
has drm.debug calls.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/xe/xe_drm_client.c | 2 ++
1 file changed, 2 inserti
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
dyndbg's CLASSMAP-v1 api was broken; DECLARE_DYNDBG_CLASSMAP tried to
do too much. Its replaced by DRM_CLASSMAP_DEFINE, which creates &
EXPORTs a classmap (in DRM core), and DRM_CLASSMAP_USE which refers to
the classmap defined elsewhere.
The drive
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
we currently get:
WARNING: Argument 'name' is not used in function-like macro
on:
#define DRM_CLASSMAP_USE(name) /* nothing here */
Following this advice is wrong here, and shouldn't be fixed by
ignoring args altogether; the macro should prop
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Add mention of comma and percent delimiters into the respective
paragraphs describing their equivalents: space and newline.
cc: linux-...@vger.kernel.org
Signed-off-by: Jim Cromie
I think this should go with the previous patches introducing the
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Current classmap code protects class'd pr_debugs from unintended
changes by "legacy" unclassed queries:
# this doesn't disable all of DRM_UT_* categories
echo "-p" > /proc/dynamic_debug/control
# name the class to change it - protective bu
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
This new test-fn runs 3 module/submodule modprobe scenarios, variously
using both the generic dyndbg= modprobe arg, and the
test-module's classmap-params to manipulate the test-mod*'s pr_debugs.
In all cases, the current flag-settings are counted and
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
This does basic testing of classmaps using '%' separated
multi-queries. It modprobes test_dynamic_debug with several classes
enabled, and counts to verify that the expected sites show the
enablement in the control file.
Signed-off-by: Jim Cromie
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
struct _ddebug_info already has almost all dyndbg's info for a module,
so finish the encapsulation. This puts the datum closer to where its
needed, improving the chance that we can obsolete the _ddebug.modame
field with a desc_modname(dp) accessor f
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Since commit
85f7f6c0edb8 ("dynamic_debug: process multiple debug-queries on a line")
Multi-query commands have been allowed:
modprobe drm dyndbg="class DRM_UT_CORE +p; class DRM_UT_KMS +p"
modprobe drm dyndbg=<
[ 203.902703] dyndbg: query p
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
New fn validates parsing and effect of queries using combinations of
commas and spaces to delimit the tokens.
It manipulates pr-debugs in builtin module/params, so might have deps
I havent foreseen on odd configurations.
Signed-off-by: Jim Cromie
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
move the DYNAMIC_DEBUG_CLASSMAP_PARAM macro from test-dynamic-debug.c into
the header, and refine it, by distinguishing the 2 use cases:
1.DYNAMIC_DEBUG_CLASSMAP_PARAM_REF
for DRM, to pass in extern __drm_debug by name.
dyndbg keeps bits i
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
DECLARE_DYNDBG_CLASSMAP() has a design error; its usage fails a basic
K&R rule: "define once, refer many times".
When DRM_USE_DYNAMIC_DEBUG=y, it is used across DRM core & drivers;
each invocation allocates/inits the classmap understood by that
modu
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
Remove the DD_CLASS_TYPE_*_NAMES classmap types and code.
These 2 classmap types accept class names at the PARAM interface, for
example:
echo +DRM_UT_CORE,-DRM_UT_KMS > /sys/module/drm/parameters/debug_names
The code works, but its only used by
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
The body of ddebug_attach_module_classes() is dominated by a
code-block that finds the contiguous subrange of classmaps matching on
modname, and saves it into the ddebug_table's info record.
Implement this block in a macro to accommodate different c
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
Split dynamic_emit_prefix() to separate out _INCL_LOOKUPs:
1. keep dynamic_emit_prefix() static inline
check _INCL_ANY flags before calling 2
2. __dynamic_emit_prefix()
prints [TID] or and trailing space if +t flag
check _INCL_LOOKUP f
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
Add _INCL_LOOKUP condition to separate +mfsl flags from +t, allowing
(after refactoring) to avoid a needless call-return.
Add a PREFIX_CACHED bit to remember that a pr-debug callsite is:
- enabled, with +p
- wants a dynamic-prefix, with _INCL_LOOKU
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
recompose struct _ddebug_info, inserting proper sub-structs.
The struct currently has 2 pairs of fields: descs, num_descs and
classes, num_classes. Several for-loops operate on these field pairs,
soon many more will be added.
Looping over these bl
Le 20/03/2025 à 19:51, Jim Cromie a écrit :
dynamic-debug has several __sections, each with ,
num_, and it iterates over these with a 2-index for-loop.
These loops are fiddly with the 2 names.
We have only 2 such loops now, but are getting more soon; lets
embed/abstract the fiddlyness in the
Le 16/03/2025 à 20:46, jim.cro...@gmail.com a écrit :
hi Louis,
On Tue, Feb 25, 2025 at 7:16 AM Louis Chauvet wrote:
Le 25/01/2025 à 07:45, Jim Cromie a écrit :
DECLARE_DYNDBG_CLASSMAP() has a design error; its usage fails a basic
K&R rule: "define once, refer many times".
It is used a
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
tiny/bochs has 5 DRM_UT_* debugs, make them controllable when
CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg that the module has
class'd debugs.
Signed-off-by: Jim Cromie
Reviewed-by: Louis Chauvet
---
drivers/gpu/drm/tiny/bochs.c | 2 ++
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
The vkms driver has a number of DRM_UT_* debugs, make them
controllable when CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg
that the module uses them.
Signed-off-by: Jim Cromie
Reviewed-by: Louis Chauvet
---
drivers/gpu/drm/vkms/vkms_drv.c
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
The udl driver has a number of DRM_UT_* debugs, make them
controllable when CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg
that the module uses them.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/udl/udl_main.c | 2 ++
1 file changed, 2 insert
Le 20/03/2025 à 19:52, Jim Cromie a écrit :
Add new drm_dyndbg_user.c with a single call to
DYNDBG_CLASSMAP_USE(drm_debug_classes). This creates a _class_user
record (and a linkage dependency).
I agree, this could be a very nice thing to automagically have the _USE
call included. But if th
The qxl driver has a number of DRM_UT_* debugs, make them
controllable when CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg
that the module uses them.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/qxl/qxl_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c
On Mon, 24 Mar 2025, Imre Deak wrote:
> On Mon, Mar 24, 2025 at 03:59:50PM +0200, Jani Nikula wrote:
>> On Mon, 24 Mar 2025, Imre Deak wrote:
>> > On Mon, Mar 24, 2025 at 02:28:35PM +0200, Jani Nikula wrote:
>> >> On Mon, 24 Mar 2025, Imre Deak wrote:
>> >> > On Mon, Mar 24, 2025 at 12:33:22PM +
Now audio enable/disable depends on an atomic commit, it doesn't make
sence. For wayland, there will trigering an atomic commit, so it
works well. But for Xorg using modesetting, there won't. In this
case, unplug the HDMI/DP and the audio jack event is not triggered,
resulting in still having a HDM
On 24/03/2025 at 22:41, Andy Shevchenko wrote:
> On Sat, Mar 22, 2025 at 06:23:13PM +0900, Vincent Mailhol via B4 Relay wrote:
>> From: Lucas De Marchi
>>
>> Implement fixed-type BIT_U*() to help drivers add stricter checks,
>> like it was done for GENMASK_U*().
>
> ...
>
>> +/*
>> + * Fixed-typ
The drm_gem_shmem_helper driver has a number of DRM_UT_* debugs, make
them controllable when CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling
dyndbg that the module uses them.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/driver
dynamic-debug has several __sections, each with ,
num_, and it iterates over these with a 2-index for-loop.
These loops are fiddly with the 2 names.
We have only 2 such loops now, but are getting more soon; lets
embed/abstract the fiddlyness in the for_subvec() macro, and avoid
repeating it going
Acked-by: Michal Mrozek
Mark engines as invalid when they are not added to the UABI list
to prevent accidental assignment of batch buffers.
Currently, this change is mostly precautionary with minimal
impact. However, in the future, when CCS engines will be
dynamically added and removed by the user, this mechanism will
be
On Mon, Mar 24, 2025 at 03:59:50PM +0200, Jani Nikula wrote:
> On Mon, 24 Mar 2025, Imre Deak wrote:
> > On Mon, Mar 24, 2025 at 02:28:35PM +0200, Jani Nikula wrote:
> >> On Mon, 24 Mar 2025, Imre Deak wrote:
> >> > On Mon, Mar 24, 2025 at 12:33:22PM +0200, Jani Nikula wrote:
> >> >> On Fri, 21 M
When writing queries to >control, flags are parsed 1st, since they are
the only required field, and they require specific compositions. So
if the flags draw an error (on those specifics), then keyword errors
aren't reported. This can be mildly confusing/annoying, so explain it
instead.
cc: linux
On Mon, 24 Mar 2025, Imre Deak wrote:
> On Mon, Mar 24, 2025 at 02:28:35PM +0200, Jani Nikula wrote:
>> On Mon, 24 Mar 2025, Imre Deak wrote:
>> > On Mon, Mar 24, 2025 at 12:33:22PM +0200, Jani Nikula wrote:
>> >> On Fri, 21 Mar 2025, Imre Deak wrote:
>> >> > Factor out from the DP AUX transfer
To support upcoming patches, we need to store the current mask
for active CCS engines.
Active engines refer to those exposed to userspace via the UABI
engine list.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 41 +++--
drivers/gpu/drm/i915/gt/intel
Currently VRR is not supported with HDMI, but we can still leverage
the VRR Timing Generator to achieve a fixed refresh rate.
Call intel_vrr_compute_config() for HDMI which will handle the vrr
timings to have fixed refresh rate with VRR Timing Generator.
v2: Improve commit message. (Ville).
Signe
For platforms for which vrr timing generator is always set, VRR_CTL
enable bit does not need to toggle, so modify the vrr_{enable/disable}
for this.
At the moment the helper intel_vrr_always_use_vrr_tg() return false for
all cases. This will be set later when all other bits are in place.
Signed-of
On Mon, Mar 24, 2025 at 02:28:35PM +0200, Jani Nikula wrote:
> On Mon, 24 Mar 2025, Imre Deak wrote:
> > On Mon, Mar 24, 2025 at 12:33:22PM +0200, Jani Nikula wrote:
> >> On Fri, 21 Mar 2025, Imre Deak wrote:
> >> > Factor out from the DP AUX transfer function the logic to lock/unlock
> >> > the
Currently, the VRR timing generator is used only when VRR is enabled by
userspace for sinks that support VRR. Starting with PTL+, gradually move
away from the legacy timing generator and use the VRR timing generator
for both variable and fixed timings.
Note: For platforms where we always enable th
For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
bits are not required. Since the support for these bits is going to
be deprecated in upcoming platforms, avoid writing these bits for the
platforms that do not use legacy Timing Generator.
Since for these platforms TRAN_VMIN is
Introduce helpers to get and set TRANS_VTOTAL registers.
This will pave way to avoid reading/writing VTOTAL.Vtotal bits for
platforms that always use VRR timing generator.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display.c | 41 +---
1 file changed, 27
VRR with joiner is currently disabled as it still needs some work to
correctly sequence the primary and secondary transcoders. However, we can
still use VRR Timing generator in fixed refresh rate for joiner and since
it just need to program vrr timings once and does not involve changing
timings on
Update the intel_set_transcoder_timings_lrr() function to use
fixed refresh rate timings.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
drivers/gpu/drm/i915/display/intel_vrr.c | 1 -
drivers/gpu/drm/i915/display/intel_vrr
Since the vrr.guardband can now change for platforms that always use the
VRR Timing Generator, and it is unsafe to reprogram the guardband on the
fly, move the guardband and pipeline_full checks from the pure !fastboot
path and add a check for intel_vrr_always_use_vrr_tg().
For older platforms the
In intel_post_plane_update() there are things which might need to do
vblank waits, so enabling PSR as early as we do now is simply
counter-productive. Therefore move intel_psr_post_plane_update() at the
last of intel_post_plane_update().
Signed-off-by: Ankit Nautiyal
Suggested-by: Ville Syrjälä
For fixed refresh rate use fixed timings for all platforms that support
VRR. For this add checks to avoid computing and reading VRR for
platforms that do not support VRR.
v2: Avoid touching check for VRR_CTL_FLIP_LINE_EN. (Ville)
v3: Avoid redundant statements in vrr_{compute/get}_config. (Ville)
During modeset enable sequence, program the fixed timings, and turn on the
VRR Timing Generator (VRR TG) for platforms that always use VRR TG.
For this intel_vrr_set_transcoder now always programs fixed timings.
Later if vrr timings are required, vrr_enable() will switch
to the real VRR timings.
For platforms that enable VRR TG only for variable timings, the
VRR_CTL.VRR_ENABLE bit indicates VRR is active. For platforms that
always have VRR TG enabled, the VRR_CTL.VRR_ENABLE bit indicates VRR
is active only when not in fixed refresh rate mode.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Vi
As per bspec 49268: Disable PSR before disabling VRR.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm
LRR and Vmax can be computed only if VRR is supported and vrr.in_range
is set. Currently we proceed with vrr timings only for VRR supporting
panels and return otherwise. For using VRR TG with fix timings, need to
continue even for panels that do not support VRR.
To achieve this, refactor the condi
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