Hello Ville,
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, October 9, 2024 11:52 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 3/9] drm/i915: Introduce plane->can_async_flip()
>
> From: Ville Syrjälä
>
> Move the "does this modifier
== Series Details ==
Series: Expose modifiers/formats supported by async flips (rev2)
URL : https://patchwork.freedesktop.org/series/140935/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15920 -> Patchwork_140935v2
Summary
> -Original Message-
> From: Deak, Imre
> Sent: Tuesday, January 7, 2025 8:33 PM
> To: Kandpal, Suraj
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; Nautiyal,
> Ankit K ; Shankar, Uma
>
> Subject: Re: [PATCH 1/2] drm/i915/cx0: Fix SSC enablement in
> PORT_CLOCK
Add driver specific function definition for the plane->funcs
format_mod_supported_async to check if the provided format/modifier is
supported for asynchronous flip.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 62 --
1 file changed, 47
Expose drm plane function to create formats/modifiers blob. This
function can be used to expose list of supported formats/modifiers for
sync/async flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_plane.c | 44 +---
include/drm/drm_plane.h |
Populate the list of formats/modifiers supported by async flip. Register
a async property and expose the same to user through blob.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 51 ++
1 file changed, 51 insertions(+)
diff --git a/driv
Seperate function for async flips is to be called in order to check the
provided format/modifier support.
At present the flag for async flip is stored in crtc_state as async flip
is supported on only one plane for a given crtc. The same is being
used over here to decide the async function pointer.
There exists a property IN_FORMATS which exposes the plane supported
modifiers/formats to the user. In some platforms when asynchronous flips
are used all of modifiers/formats mentioned in IN_FORMATS are not
supported. This patch adds a new plane property IN_FORMATS_ASYNC to
expose the async flips
All of the formats/modifiers supported by the plane during synchronous
flips are nor supported by asynchronous flips. The formats/modifiers
exposed to user by IN_FORMATS exposes all formats/modifiers supported by
plane and this list varies for async flips. If the async flip supported
formats/modifi
== Series Details ==
Series: drm/i915/selftests: Correct frequency handling in RPS power measurement
URL : https://patchwork.freedesktop.org/series/143213/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15920 -> Patchwork_143213v1
===
From: Sk Anirban
Fix the frequency calculation by ensuring it is adjusted
only once during power measurement. Update live_rps_power test
to use the correct frequency values for logging and comparison.
Signed-off-by: Sk Anirban
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 9 +
1 file ch
Hi All,
On Mon, 6 Jan 2025 13:03:48 +1100 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
>
> drivers/gpu/drm/i915/display/intel_display_driver.c
>
> between commit:
>
> 4fc0cee83590 ("drivers: remove get_task_comm() and print task comm
> dir
== Series Details ==
Series: drm/i915/gt: Prevent uninitialized pointer reads (rev2)
URL : https://patchwork.freedesktop.org/series/142986/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15920 -> Patchwork_142986v2
Summary
-
On Fri, Dec 20, 2024 at 08:55:32PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dmc_wl: Support extra values for dmc_wl_enable for debugging
> URL : https://patchwork.freedesktop.org/series/142855/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_
== Series Details ==
Series: drm/i915/gvt: store virtual_dp_monitor_edid in rodata (rev5)
URL : https://patchwork.freedesktop.org/series/142793/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15919 -> Patchwork_142793v5
Summ
== Series Details ==
Series: drm/i915/display: Don't update DBUF_TRACKER_STATE_SERVICE (rev2)
URL : https://patchwork.freedesktop.org/series/142892/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15919 -> Patchwork_142892v2
On Tue, Jan 07, 2025 at 11:27:03PM +0530, Ravi Kumar Vodapalli wrote:
> DBUF_TRACKER_STATE_SERVICE is set only during initialization.
> We see that it was done for TGL (display version 12) and DG2,
> because the field didn't actually have 0x8 as default value,
> so the driver had to take care of it
== Series Details ==
Series: x86/platform/iosf_mbi: Remove unused
iosf_mbi_unregister_pmic_bus_access_notifier
URL : https://patchwork.freedesktop.org/series/143188/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15919 -> Patchwork_143188v1
== Series Details ==
Series: drm/i915: Remove deadcode
URL : https://patchwork.freedesktop.org/series/143187/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15919 -> Patchwork_143187v1
Summary
---
**SUCCESS**
No re
== Series Details ==
Series: drm/i915: Remove deadcode
URL : https://patchwork.freedesktop.org/series/143187/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
== Series Details ==
Series: drm/i915/gvt: Deadcoding
URL : https://patchwork.freedesktop.org/series/143186/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15918 -> Patchwork_143186v1
Summary
---
**FAILURE**
Seriou
On Fri, 2024-11-29 at 08:50 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Mesa changed its clear color alignment without informing the kernel,
> and now the kernel expects 4k alignment whereas Mesa only guaratees
> 64 bytes. Reduce the kernel alignment requirement to the same 64 bytes
> s
Hi Sima and Dave,
Here goes the last i915 towards 6.14.
An active display round with some big series, but
nothing extraordinary.
Thanks,
Rodrigo.
drm-intel-next-2025-01-07:
Driver Changes:
- Some DG2 refactor to fix DG2 bugs when operating with certain CPUs (Raag)
- Use hw support for min/int
On Fri, Jan 03, 2025 at 12:38:43PM +, Bhadane, Dnyaneshwar wrote:
>
>
> > -Original Message-
> > From: Kandpal, Suraj
> > Sent: Friday, January 3, 2025 2:15 PM
> > To: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > Cc: Bhadane, Dnyaneshwar ; Kandpal,
> > Suraj
>
Hi Sima and Dave,
Here goes the last Xe PR towards 6.14.
It is important to highlight that this has a Revert that
fixes a regression that was part of my previous pull request:
- Revert some changes that break a mesa debug tool.
Other than that a quiet and small round.
Thanks,
Rodrigo.
drm-xe-n
The virtual DP EDID isn't modified. Add const modifier to store it in
rodata.
Reviewed-by: Nemesa Garg
Reviewed-by: Zhi Wang
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gvt/display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/display.c
DBUF_TRACKER_STATE_SERVICE is set only during initialization.
We see that it was done for TGL (display version 12) and DG2,
because the field didn't actually have 0x8 as default value,
so the driver had to take care of it.
According to the BSpec.
The most compeling reason why we should not program
On Tue, 31 Dec 2024, Gustavo Sousa wrote:
> Quoting Jani Nikula (2024-12-31 13:27:37-03:00)
>>In preparation for making struct intel_pmdemand_state an opaque type,
>>convert to_intel_pmdemand_state() to a function.
>>
>>Cc: Gustavo Sousa
>>Signed-off-by: Jani Nikula
>
> This looks good to me, so
On Fri, 03 Jan 2025, Jani Nikula wrote:
> This is v4 of [1], enabling uncompressed 128b/132b UHBR SST.
>
> Address review comments from Imre.
Thanks for the review, pushed to drm-intel-next.
BR,
Jani.
>
> [1] https://lore.kernel.org/r/cover.1734643485.git.jani.nik...@intel.com
>
> Jani Nikula (
On Tue, 07 Jan 2025, Maxime Ripard wrote:
> On Tue, Jan 07, 2025 at 11:55:42AM +0200, Jani Nikula wrote:
>> On Fri, 03 Jan 2025, Jani Nikula wrote:
>> > The struct drm_dp_mst_topology_mgr *mgr parameter is only used for debug
>> > logging in case the passed in link rate or lane count are zero. Th
== Series Details ==
Series: drm/i915: Remove unused intel_huc_suspend
URL : https://patchwork.freedesktop.org/series/143185/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15916 -> Patchwork_143185v1
Summary
---
**SU
== Series Details ==
Series: drm/i915: Remove unused intel_huc_suspend
URL : https://patchwork.freedesktop.org/series/143185/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
== Series Details ==
Series: drm/dp: Rework LTTPR transparent mode handling and add support to msm
driver
URL : https://patchwork.freedesktop.org/series/143184/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15916 -> Patchwork_143184v1
=
== Series Details ==
Series: drm/dp: Rework LTTPR transparent mode handling and add support to msm
driver
URL : https://patchwork.freedesktop.org/series/143184/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separatel
On 07/01/2025 15:42, Thomas Zimmermann wrote:
Hi Jocelyn
Am 07.01.25 um 13:10 schrieb Jocelyn Falempe:
On 12/12/2024 18:08, Thomas Zimmermann wrote:
Rework fbdev probing to support fbdev_probe in struct drm_driver
and remove the old fb_probe callback. Provide an initializer macro
that sets th
On Tue, Jan 07, 2025 at 11:55:42AM +0200, Jani Nikula wrote:
> On Fri, 03 Jan 2025, Jani Nikula wrote:
> > The struct drm_dp_mst_topology_mgr *mgr parameter is only used for debug
> > logging in case the passed in link rate or lane count are zero. There's
> > no further error checking as such, and
On Mon, Jan 06, 2025 at 09:38:20AM +0530, Suraj Kandpal wrote:
> SSC for PLL_A is enabled for UHBR10 or UHBR20 regardless of the
> need for SSC. This means the ssc_enabled variable had no say
> to determine enablement of SSC on PLL A.
I don't see the above in the spec. It suggests that SSC should
* Tvrtko Ursulin (tursu...@ursulin.net) wrote:
>
> Hi,
>
> On 22/12/2024 17:47, li...@treblig.org wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > i915_active_acquire_for_context() was added in 2020 by
> > commit 5d9341370f57 ("drm/i915: Export a preallocate variant of
> > i915_active_acquire(
On Wed, 1 Jan 2025 17:39:20 +0200
Alexander Usyskin wrote:
> GSC NVM controller HW errors on quad access overlapping 1K border.
> Align 64bit read and write to avoid readq/writeq over 1K border.
>
> Acked-by: Miquel Raynal
> Signed-off-by: Alexander Usyskin
> ---
> drivers/mtd/devices/mtd-in
From: "Dr. David Alan Gilbert"
The last use of iosf_mbi_unregister_pmic_bus_access_notifier() was
removed in 2017 by
commit a5266db4d314 ("drm/i915: Acquire PUNIT->PMIC bus for
intel_uncore_forcewake_reset()")
Remove it.
Note the '_unlocked' version is still used.
Signed-off-by: Dr. David Alan
On 25-01-03 20:09:42, Dmitry Baryshkov wrote:
> On Fri, Jan 03, 2025 at 02:58:17PM +0200, Abel Vesa wrote:
> > LTTPRs operating modes are defined by the DisplayPort standard and the
> > generic framework now provides a helper to switch between them, which
> > is handling the explicit disabling of n
From: "Dr. David Alan Gilbert"
The last use of intel_ring_cacheline_align() was removed in 2017 by
commit afa8ce5b3080 ("drm/i915: Nuke legacy flip queueing code")
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/gpu/drm/i915/gt/intel_ring.c | 24
drivers/
Here are the logs requested as per the link you sent me:
1. uname -a:
Linux MacBook 6.12.8-1-t2-noble #1 SMP PREEMPT_DYNAMIC Fri Jan 3 15:43:23 UTC
2025 x86_64 x86_64 x86_64 GNU/Linux
2. lspci -vnn -d :*:0300:
00:02.0 VGA compatible controller [0300]: Intel Corporation CoffeeLake-H GT2
[UHD G
On 24-12-11 15:42:27, Johan Hovold wrote:
> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote:
>
> > +/**
> > + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in transparent mode
> > + * @aux: DisplayPort AUX channel
> > + * @enable: Enable or disable transparent mode
> > + *
> > + *
From: "Dr. David Alan Gilbert"
intel_vgpu_decode_sprite_plane() was added in 2017 by
commit 9f31d1063b43 ("drm/i915/gvt: Add framebuffer decoder support")
but has remained unused.
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/gpu/drm/i915/gvt/fb_decoder.c | 117
From: "Dr. David Alan Gilbert"
i915_active_acquire_for_context() was added in 2020 by
commit 5d9341370f57 ("drm/i915: Export a preallocate variant of
i915_active_acquire()") but has never been used.
The last use of __i915_gem_object_is_lmem() was removed in 2021 by
commit ff20afc4cee7 ("drm/i915
According to the DisplayPort standard, LTTPRs have two operating
modes:
- non-transparent - it replies to DPCD LTTPR field specific AUX
requests, while passes through all other AUX requests
- transparent - it passes through all AUX requests.
Switching between this two modes is done by the DPT
LTTPRs operating modes are defined by the DisplayPort standard and the
generic framework now provides a helper to switch between them, which
is handling the explicit disabling of non-transparent mode and its
disable->enable sequence mentioned in the DP Standard v2.0 section
3.6.6.1.
So use the new
From: "Dr. David Alan Gilbert"
The last use of intel_gvt_in_force_nonpriv_whitelist() was
removed in 2020 by
commit 02dd2b12a685 ("drm/i915/gvt: unify lri cmd handler and mmio
handlers")
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/gpu/drm/i915/gvt/handlers.c | 17
From: "Dr. David Alan Gilbert"
intel_gvt_ggtt_h2g_index() and intel_gvt_ggtt_index_g2h() were
added in 2016 by
commit 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
but haven't been used.
Remove them.
They were the only users of intel_gvt_ggtt_gmadr_g2h() and
intel_gvt_ggtt_
Hello maintainers
This bug has been there for a long time, and hasn't been fixed yet. In case the
Intel GPU is used as boot GPU on Apple T2 MacBooks, the bottom and right edges
of the tty are no longer seen, thus making some text not visible.
It has been reported in almost all Apple T2 MacBooks
On 24-12-11 15:56:53, Johan Hovold wrote:
> On Wed, Dec 11, 2024 at 03:04:15PM +0200, Abel Vesa wrote:
>
> > +static void msm_dp_display_lttpr_init(struct msm_dp_display_private *dp)
> > +{
> > + int lttpr_count;
> > +
> > + if (drm_dp_read_lttpr_common_caps(dp->aux, dp->panel->dpcd,
> > +
From: "Dr. David Alan Gilbert"
intel_huc_suspend() was added in 2022 by
commit 27536e03271d ("drm/i915/huc: track delayed HuC load with a
fence")
but hasn't been used.
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
drivers/gpu/drm/i915/gt/uc/intel_huc.c | 13 -
drivers/gpu/d
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13466
I’ve filed it there.
> On 7 Jan 2025, at 6:02 PM, Jani Nikula wrote:
>
> On Tue, 07 Jan 2025, Aditya Garg wrote:
>> Here are the logs requested as per the link you sent me:
>
> It also says, "Please file issues in the drm/i915 issu
On 24-12-11 21:22:00, Dmitry Baryshkov wrote:
> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote:
> > According to the DisplayPort standard, LTTPRs have two operating
> > modes:
> > - non-transparent - it replies to DPCD LTTPR field specific AUX
> >requests, while passes through all o
From: "Dr. David Alan Gilbert"
Remove a bunch of long unused functions from
the gvt code.
Signed-off-by: Dr. David Alan Gilbert
Dr. David Alan Gilbert (3):
drm/i915/gvt: Remove intel_gvt_ggtt_h2g<->index
drm/i915/gvt: Remove unused intel_vgpu_decode_sprite_plane
drm/i915/gvt: Remove unu
Note: zhen...@linux.intel.com's address bounces:
> The following message to was undeliverable.
> The reason for the problem:
> 5.1.0 - Unknown address error 550-'5.1.1 : Recipient
> address rejected: User unknown in
+virtual mailbox table'
* li...@treblig.org (li...@treblig.org) wrote:
> From:
Looking at both i915 and nouveau DP drivers, both are setting the first
LTTPR (if found) in transparent mode first and then in non-transparent
mode, just like the DP v2.0 specification mentions in section 3.6.6.1.
Being part of the standard, setting the LTTPR in a specific operation mode
can be ea
Link Training Tunable PHY Repeaters (LTTPRs) are defined in DisplayPort
1.4a specification. As the name suggests, these PHY repeaters are
capable of adjusting their output for link training purposes.
According to the DisplayPort standard, LTTPRs have two operating
modes:
- non-transparent - it re
On Wed, 1 Jan 2025 16:41:19 +
David Laight wrote:
> On Wed, 1 Jan 2025 17:39:20 +0200
> Alexander Usyskin wrote:
>
> > GSC NVM controller HW errors on quad access overlapping 1K border.
> > Align 64bit read and write to avoid readq/writeq over 1K border.
> >
> > Acked-by: Miquel Raynal
>
LTTPRs operating modes are defined by the DisplayPort standard and the
generic framework now provides a helper to switch between them, which
is handling the explicit disabling of non-transparent mode and its
disable->enable sequence mentioned in the DP Standard v2.0 section
3.6.6.1.
So use the new
Hi Jocelyn
Am 07.01.25 um 13:10 schrieb Jocelyn Falempe:
On 12/12/2024 18:08, Thomas Zimmermann wrote:
Rework fbdev probing to support fbdev_probe in struct drm_driver
and remove the old fb_probe callback. Provide an initializer macro
that sets the callback in struct drm_driver according to th
Hi Nitin,
...
> @@ -4485,7 +4485,7 @@ static u32 mask_reg_value(u32 reg, u32 val)
> if (REG_EQUAL(reg, HALF_SLICE_CHICKEN2))
> val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);
>
> - /* WAIT_FOR_RC6_EXIT has only one bit fullfilling the function
> + /* WAIT_FOR_RC
On 1/6/2025 10:21 PM, Mitul Golani wrote:
Check if dsc prefill latency is sufficient for vblank.
--v2:
- Consider chroma downscaling factor in latency calculation. [Ankit]
- Replace function name from dsc_prefill_time to dsc_prefill_latency.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/
On 1/6/2025 10:21 PM, Mitul Golani wrote:
Check if vblank is too short for scaler prefill latency.
--v2:
- Use hweight* family of functions for counting bits. [Jani]
- Update precision handling for hscale and vscale. [Ankit]
- Consider chroma downscaling factor during latency
calculation. [Ank
Hi Nitin,
On Mon, Jan 06, 2025 at 04:00:35PM +0530, Nitin Gote wrote:
> Fix all typos in files under drm/i915/soc reported by codespell tool.
>
> Signed-off-by: Nitin Gote
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Nitin,
...
> diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c
> b/drivers/gpu/drm/i915/selftests/i915_vma.c
> index 71b52d5efef4..79fff5ec9082 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_vma.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
> @@ -159,7 +159,7 @@ static int igt_
On 1/6/2025 10:21 PM, Mitul Golani wrote:
Compute scaling factors and scaler user for pipe scaler if
particular scaler user is pipe scaler.
--v2:
- Update typo 'plane scaling' to 'pipe scaling'. [Ankit]
- Remove FIXME tag which was added to check for pipe scaling
factors as well. [Ankit]
- Sho
On 1/6/2025 10:21 PM, Mitul Golani wrote:
Pass crtc_state to intel_atomic_setup_scaler, this will help to
check if pch_pfit enabled or not and also will be useful to pass
scaler_state with the same which will be used later to store
hscale and vscale values.
-- v2:
- Commit message updates. par
On 1/6/2025 10:21 PM, Mitul Golani wrote:
Add scaling factors to scaler_state for a perticular scaler user,
typo: particular
use it later to compute scaler prefill latency. Also to extend this
when either pipe or plane scaler is in use.
As I understand we are adding a new member to store
On Mon, 06 Jan 2025, Nitin Gote wrote:
> @@ -8440,7 +8440,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private
> *dev_priv,
>
> /*
>* Most people will probably want a fullscreen
> - * plane so let's not advertize modes that are
> + * plane so let's not advertise
Hi Nitin,
On Mon, Jan 06, 2025 at 04:00:32PM +0530, Nitin Gote wrote:
> Fix all typos in files under drm/i915/gem reported by codespell tool.
>
> Signed-off-by: Nitin Gote
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Nitin,
On Mon, Jan 06, 2025 at 04:00:33PM +0530, Nitin Gote wrote:
> Fix all typos in files under drm/i915/pxp reported by codespell tool.
>
> Signed-off-by: Nitin Gote
Reviewed-by: Andi Shyti
Thanks,
Andi
On Tue, 07 Jan 2025, Aditya Garg wrote:
> Here are the logs requested as per the link you sent me:
It also says, "Please file issues in the drm/i915 issue tracker for i915
driver bugs"
I was looking to have that issue created with the logs attached there
instead of mailing lists and pastebins an
On 12/12/2024 18:08, Thomas Zimmermann wrote:
Rework fbdev probing to support fbdev_probe in struct drm_driver
and remove the old fb_probe callback. Provide an initializer macro
that sets the callback in struct drm_driver according to the kernel
configuration. Call drm_client_setup_with_color_mod
== Series Details ==
Series: drm/i915/dp: 128b/132b uncompressed SST (rev5)
URL : https://patchwork.freedesktop.org/series/142547/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15914 -> Patchwork_142547v5
Summary
---
== Series Details ==
Series: drm/i915/dp: 128b/132b uncompressed SST (rev5)
URL : https://patchwork.freedesktop.org/series/142547/
State : warning
== Summary ==
Error: dim checkpatch failed
ad7b8974429f drm/mst: remove mgr parameter and debug logging from
drm_dp_get_vc_payload_bw()
8fd16db384
On Sat, 14 Dec 2024 15:37:04 +0200, Dmitry Baryshkov wrote:
> While working on the generic mode_valid() implementation for the HDMI
> Connector framework I noticed that unlike other DRM objects
> drm_connector accepts non-const pointer to struct drm_display_mode,
> while obviously mode_valid() isn'
== Series Details ==
Series: drm/i915/dp: 128b/132b uncompressed SST (rev5)
URL : https://patchwork.freedesktop.org/series/142547/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Nitin,
On Mon, Jan 06, 2025 at 04:00:31PM +0530, Nitin Gote wrote:
> Fix all typos in files under drm/i915/gvt reported by codespell tool.
>
> Signed-off-by: Nitin Gote
Reviewed-by: Andi Shyti
Thanks,
Andi
Hi Nitin,
great job!
Just one correction:
...
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 5b8080ec5315..f6767fbdada5 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -512,7 +512,7
On Fri, 03 Jan 2025, Jani Nikula wrote:
> The struct drm_dp_mst_topology_mgr *mgr parameter is only used for debug
> logging in case the passed in link rate or lane count are zero. There's
> no further error checking as such, and the function returns 0.
>
> There should be no case where the parame
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, January 6, 2025 6:54 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: RE: [PATCH v3] drm/i915/display: Adjust Added Wake Time with
> PKG_C_LATENCY
>
>
>
> > -Origin
Write the payload allocation table for 128b/132b SST. Use VCPID 1 and
start from slot 0, with dp_m_n.tu slots.
This is preparation for enabling 128b/132b SST. This path is not
reachable yet. Indeed, we don't yet compute TU for 128b/132b SST.
v2: Handle drm_dp_dpcd_write_payload() failures (Imre)
> -Original Message-
> From: Shankar, Uma
> Sent: Monday, January 6, 2025 2:05 AM
> To: Borah, Chaitanya Kumar ; intel-
> x...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com
> Subject: RE: [RFC PATCH] drm/xe/display: Program double buffered LUT
>
On Fri, Jan 03, 2025 at 02:58:18PM +0200, Abel Vesa wrote:
> Link Training Tunable PHY Repeaters (LTTPRs) are defined in DisplayPort
> 1.4a specification. As the name suggests, these PHY repeaters are
> capable of adjusting their output for link training purposes.
>
> According to the DisplayPort
On Fri, Jan 03, 2025 at 02:58:15PM +0200, Abel Vesa wrote:
> According to the DisplayPort standard, LTTPRs have two operating
> modes:
> - non-transparent - it replies to DPCD LTTPR field specific AUX
>requests, while passes through all other AUX requests
> - transparent - it passes through a
On Fri, 03 Jan 2025, Gustavo Sousa wrote:
> The current display IRQ code calls some IRQ-specific helpers that use
> intel_uncore_*() MMIO functions instead of the display-specific ones.
> Wrap those helpers in intel_de.h and use them to ensure that the proper
> display-specific hooks (currently on
ping
Am 12.12.24 um 18:08 schrieb Thomas Zimmermann:
i915 and xe are the last remaining drivers that still implement their
own fbdev client. All other clients have been mass converted to DRM's
client setup in in the series at [1]. As Intel drivers require more
effort than others, their changes
On 1/3/2025 8:44 AM, Ankit Nautiyal wrote:
Currently, when bandwidth is insufficient for a given mode, we attempt
to use DSC. This is indicated by a debug print, followed by a check for
DSC support.
The debug message states that we are trying DSC, but DSC might not be
supported, which can give
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