On 18-Dec-24 11:54 PM, Vodapalli, Ravi Kumar wrote:
Hi,
My inline comments
On 12/18/2024 2:07 AM, Bhadane, Dnyaneshwar wrote:
-Original Message-
From: Vodapalli, Ravi Kumar
Sent: Tuesday, December 17, 2024 11:00 PM
To:intel-gfx@lists.freedesktop.org
Cc: Vivekanandan, Balasubramani
On (24/12/13 16:15), Jani Nikula wrote:
> Jani Nikula (6):
> drm/i915/ddi: change intel_ddi_init_{dp,hdmi}_connector() return type
> drm/i915/hdmi: propagate errors from intel_hdmi_init_connector()
> drm/i915/hdmi: add error handling in g4x_hdmi_init()
> drm/i915/ddi: gracefully handle erro
On (24/12/13 16:15), Jani Nikula wrote:
> Another round of [1], adding patch 1 and slightly modifying patch 4.
>
> There are cases where we want to gracefully handle but *not* propagate
> errors from HDMI connector init, because we don't want to fail the
> entire DDI init, as the DP could still be
== Series Details ==
Series: drm/i915/gt: Use ENGINE_TRACE for tracing. (rev7)
URL : https://patchwork.freedesktop.org/series/140358/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15867 -> Patchwork_140358v7
Summary
---
On 29-11-2024 21:17, Sk Anirban wrote:
Add RC6 & RC0 frequency printing to ensure accurate energy
readings aimed at addressing GPU energy leaks and power
measurement failures.
Also update sleep time for RC6 mode to match RC0.
v2:
- Improved commit message.
v3:
- Used pr_err log to displ
> -Original Message-
> From: Manna, Animesh
> Sent: Wednesday, December 18, 2024 4:04 PM
> To: Kandpal, Suraj ; intel-
> g...@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: RE: [PATCH v2] drm/i915/display: Adjust Added Wake Time with
> PKG_C_LATENCY
>
>
>
> > -O
== Series Details ==
Series: drm/i915/gt: Use ENGINE_TRACE for tracing. (rev6)
URL : https://patchwork.freedesktop.org/series/140358/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15865 -> Patchwork_140358v6
Summary
---
Reviewed-by: Zhi Wang
Garg, Nemesa 于 2024年12月18日周三 下午3:37写道：
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of
> Jani
> > Nikula
> > Sent: Wednesday, December 18, 2024 7:50 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel-gvt-...@lists.freedesktop.org; Nikula, Jani <
Hi Vinay,
On 2024-12-15 at 16:32:38 -0800, Vinay Belgaumkar wrote:
> Add GT C6 and Frequency support. These will use the PMU interface
> and are displayed per GT/device in the header.
>
> GT: 0, c6: 94.54% req_freq: 750.63 MHz act_freq:0.00 MHz
> GT: 1, c6: 2.75% req_freq: 1200.71 MHz act_
== Series Details ==
Series: drm/i915: Drop 64bpp YUV formats for SDR planes and improve tracepoints
URL : https://patchwork.freedesktop.org/series/142801/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15864 -> Patchwork_142801v1
===
Hi,
My inline comments
On 12/18/2024 2:07 AM, Bhadane, Dnyaneshwar wrote:
-Original Message-
From: Vodapalli, Ravi Kumar
Sent: Tuesday, December 17, 2024 11:00 PM
To:intel-gfx@lists.freedesktop.org
Cc: Vivekanandan, Balasubramani
; Roper, Matthew D
; De Marchi, Lucas
; Sousa, Gustavo
== Series Details ==
Series: drm/i915: Drop 64bpp YUV formats for SDR planes and improve tracepoints
URL : https://patchwork.freedesktop.org/series/142801/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./
== Series Details ==
Series: drm/i915: Drop 64bpp YUV formats for SDR planes and improve tracepoints
URL : https://patchwork.freedesktop.org/series/142801/
State : warning
== Summary ==
Error: dim checkpatch failed
ffe351ada14d drm/i915: Drop 64bpp YUV formats from ICL+ SDR planes
-:49: WARNIN
From: Ville Syrjälä
Make debugging a bit easier by including the pixel format in
the plane tracpoints.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_trace.h | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/displ
From: Ville Syrjälä
Using the plane->state pointer in the tracepoints is incorrect
as technically a different state could already have been swapped
in (though in reality that is currently prevented by the stall
hacks in the commit machinery). But let's not leave such footguns
lying around when we
From: Ville Syrjälä
Get rid of the 64bpp YUV formats on ICL+ SDR planes due to
some weird underruns they're causing on TGL, and also bspec
seems to be telling us to not use them either.
Also included some improvements to the tracepoints
that I used to hunt this down.
Ville Syrjälä (4):
drm/i9
From: Ville Syrjälä
I'm seeing underruns with these 64bpp YUV formats on TGL.
The weird details:
- only happens on pipe B/C/D SDR planes, pipe A SDR planes
seem fine, as do all HDR planes
- somehow CDCLK related, higher CDCLK allows for bigger plane
with these formats without underruns. With
From: Ville Syrjälä
Out plane names already include the "plane" part (or
"primary","sprite","cursor" in some cases). Don't duplicate
that in the tracpoints as that leadst to weird stuff like
"plane plane 1A".
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_trace.h |
== Series Details ==
Series: Display Global Histogram (rev11)
URL : https://patchwork.freedesktop.org/series/135793/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15863 -> Patchwork_135793v11
Summary
---
**SUCCESS**
== Series Details ==
Series: Display Global Histogram (rev11)
URL : https://patchwork.freedesktop.org/series/135793/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/gvt: store virtual_dp_monitor_edid in rodata
URL : https://patchwork.freedesktop.org/series/142793/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15863 -> Patchwork_142793v1
Summary
---
== Series Details ==
Series: drm/i915/dmc_wl: store register ranges in rodata
URL : https://patchwork.freedesktop.org/series/142790/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15863 -> Patchwork_142790v1
Summary
---
> > >> @@ -474,20 +478,28 @@ static int intel_dg_mtd_erase(struct mtd_info
> > *mtd, struct erase_info *info)
> > >> total_len = info->len;
> > >> addr = info->addr;
> > >>
> > >> +ret = pm_runtime_resume_and_get(mtd->dev.parent);
> > > on this, I really don't believe this
Hi Dave, Sima,
This week a few fixes around GuC engine busyness reporting. Fixing some
races relating to engine and GT reset, and in general.
Regards,
Tvrtko
drm-intel-fixes-2024-12-18:
- Reset engine utilization buffer before registration (Umesh Nerlige Ramappa)
- Ensure busyness counter inc
Add drm-crtc property for histogram and for the properties added add
the corresponding get/set_property.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_atomic_state_helper.c | 14
drivers/gpu/drm/drm_atomic_uapi.c | 15
drivers/gpu/drm/drm_crtc.c|
Add drm-crtc property for IET 1DLUT and for the properties added add
corresponding get/set_property.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_atomic_state_helper.c | 9
drivers/gpu/drm/drm_atomic_uapi.c | 13 +++
drivers/gpu/drm/drm_crtc.c| 3
Display Histogram is an array of bins and can be generated in many ways
referred to as modes.
Ex: HSV max(RGB), Wighted RGB etc.
Understanding the histogram data format(Ex: HSV max(RGB))
Histogram is just the pixel count.
For a maximum resolution of 10k (10240 x 4320 = 44236800)
25 bits should be
ImageEnhancemenT(IET) hardware interpolates the LUT value to generate
the enhanced output image. LUT takes an input value, outputs a new
value based on the data within the LUT. 1D LUT can remap individual
input values to new output values based on the LUT sample. LUT can be
interpolated by the hard
drm_crtc.h| 77 ++
include/uapi/drm/drm_mode.h | 105 ++
5 files changed, 330 insertions(+)
---
base-commit: 78526dfb8799485890dae3877fea308e9501879c
change-id: 20241218-dpst-c8ecf18062bb
Best regards,
--
Arun R Murthy
On Tue, Dec 17, 2024 at 04:34:40PM +0200, Mika Kahola wrote:
> tbt-alt mode is missing uhbr rates 10G and 20G. This requires
> requires pll clock rates 312.5 MHz and 625 MHz to be added,
> respectively. The uhbr rates are supported only form PTL+
> platforms.
>
> v2: Add drm_WARN_ON() to check if
Hi Matt,
On Mon, Dec 16, 2024 at 01:27:51PM -0800, Matt Roper wrote:
> On Thu, Dec 12, 2024 at 03:51:12PM +0100, Andi Shyti wrote:
> > On Fri, Dec 06, 2024 at 10:38:24AM -0500, Rodrigo Vivi wrote:
> > > On Thu, Dec 05, 2024 at 03:47:35PM +, Sebastian Brzezinka wrote:
> > > > `wa_verify`sporadi
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Wednesday, December 18, 2024 7:50 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-gvt-...@lists.freedesktop.org; Nikula, Jani
> Subject: [PATCH] drm/i915/gvt: store virtual_dp_monitor_edid in rodata
>
> The
Quoting Jani Nikula (2024-12-18 11:17:34-03:00)
>Add const to register range arrays to store them in rodata. They don't
>need to be modified.
>
>Cc: Gustavo Sousa
>Signed-off-by: Jani Nikula
Good idea.
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/intel_dmc_wl.c | 6 +++---
>
Hi Sebastian,
...
> + /*
> + * Writing workarounds can sporadically fail,
> + * in which case try to apply it again.
You have a double space here. Apart from that the patch looks good to
me.
Reviewed-by: Krzysztof Karas
Krzysztof
> + */
> +
The virtual DP EDID isn't modified. Add const modifier to store it in
rodata.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gvt/display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/display.c
b/drivers/gpu/drm/i915/gvt/display.c
index 95570
Add const to register range arrays to store them in rodata. They don't
need to be modified.
Cc: Gustavo Sousa
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_d
On Wed, 18 Dec 2024, "Kandpal, Suraj" wrote:
>> -Original Message-
>> From: Intel-gfx On Behalf Of Jani
>> Nikula
>> Sent: Tuesday, December 17, 2024 6:52 PM
>> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
>> Cc: Nikula, Jani
>> Subject: [PATCH v2] drm/i915/display
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, December 9, 2024 7:19 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: RE: [PATCH v2] drm/i915/display: Adjust Added Wake Time with
> PKG_C_LATENCY
>
>
>
> > -Origi
== Series Details ==
Series: drm/i915/cx0_phy: Update HDMI TMDS C20 algorithm value (rev4)
URL : https://patchwork.freedesktop.org/series/141280/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15861 -> Patchwork_141280v4
Sum
== Series Details ==
Series: drm/i915/cx0_phy: Update HDMI TMDS C20 algorithm value (rev4)
URL : https://patchwork.freedesktop.org/series/141280/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/cx0_phy: Update HDMI TMDS C20 algorithm value (rev4)
URL : https://patchwork.freedesktop.org/series/141280/
State : warning
== Summary ==
Error: dim checkpatch failed
d77020e25e92 drm/i915/display: Add MTL subplatforms definition
-:69: ERROR:COMPLEX_MACRO:
Hi Dave & Sima,
Here goes the pre-holidays drm-intel-gt-next PR towards 6.14 as promised.
As the main improvement there is engine busyness accuracy improvements
for GuC submission platforms and fixup for BO mapping corner cases.
The rest is smaller refactoring and improvements.
Happy Holidays!
== Series Details ==
Series: Enable GuC SLPC default balancing strategies (rev2)
URL : https://patchwork.freedesktop.org/series/142676/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15861 -> Patchwork_142676v2
Summary
-
== Series Details ==
Series: Check if is vblank too short
URL : https://patchwork.freedesktop.org/series/142745/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15861 -> Patchwork_142745v1
Summary
---
**FAILURE**
Se
== Series Details ==
Series: Check if is vblank too short
URL : https://patchwork.freedesktop.org/series/142745/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warnin
== Series Details ==
Series: drm/i915/display: Don't program DBUF_CTL tracker state service
URL : https://patchwork.freedesktop.org/series/142744/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15861 -> Patchwork_142744v1
Su
== Series Details ==
Series: drm/ci: uprev IGT (rev3)
URL : https://patchwork.freedesktop.org/series/135749/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15861 -> Patchwork_135749v3
Summary
---
**SUCCESS**
No reg
== Series Details ==
Series: drm/i915/display: UHBR rates for Thunderbolt
URL : https://patchwork.freedesktop.org/series/142727/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15861 -> Patchwork_142727v1
Summary
---
*
48 matches
Mail list logo
