On Tue, Nov 19, 2024 at 10:25:10AM +0530, Ghimiray, Himal Prasad wrote:
> On 15-11-2024 10:37, Raag Jadav wrote:
> > This was previously attempted as xe specific reset uevent but dropped
> > in commit 77a0d4d1cea2 ("drm/xe/uapi: Remove reset uevent for now")
> > as part of refactoring.
> >
> > Now
On 10/30/2024 8:04 PM, Raag Jadav wrote:
Refactor DG2 PCI IDs into D, E and M ranges which will be useful for
segment specific features.
v3: Rework subplatform naming (Jani)
Signed-off-by: Raag Jadav
Looks good to me
Reviewed-by: Riana Tauro
---
include/drm/intel/pciids.h | 55
== Series Details ==
Series: mtd: add driver for Intel discrete graphics (rev3)
URL : https://patchwork.freedesktop.org/series/140306/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15720 -> Patchwork_140306v3
Summary
--
== Series Details ==
Series: Consider joiner calculation for panel fitting (rev5)
URL : https://patchwork.freedesktop.org/series/136561/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15722 -> Patchwork_136561v5
Summary
> -Original Message-
> From: Intel-xe On Behalf Of Arun R
> Murthy
> Sent: Tuesday, November 19, 2024 4:15 PM
> To: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: [PATCHv2 1/8] drm/i915/histogram: Defin
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: 18 November 2024 13:38
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com
> Subject: Re: [PATCH v3 3/3] drm/i915/dp: Compute as_sdp based on if vrr
> possible
>
>
> On 10/21/2
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: 18 November 2024 13:30
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com
> Subject: Re: [PATCH v3 2/3] drm/i915/dp: Set FAVT mode in DP SDP with
> fixed refresh rate
>
>
> On
== Series Details ==
Series: Consider joiner calculation for panel fitting (rev5)
URL : https://patchwork.freedesktop.org/series/136561/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/as
Thanks Ankit for the review,
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: 18 November 2024 13:26
> To: Golani, Mitulkumar Ajitkumar ;
> intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com
> Subject: Re: [PATCH v3 1/3] drm/i915/vrr: Update vrr.vsync_{start,end}
>
Allow joiner for pfit after taking into account
the joiner part and making all the adjustments
related to it.
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_pfit.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c
b/drivers/gpu/dr
Replace adjusted_mode with pipe_mode in pch_panel_fitting
so as to that final pipe src width and height is used after
joiner calculation. De-couple the current intel_panel_fitting
function, one pre-ilk and one post-ilk, as post-ilk
pch_panel_fitting is called from pipe_config.
Signed-off-by: Nemes
There is an issue when pch_pfit and joiner gets enabled together.
Moves the panel_fitting to later stage after pipe_src width is adjusted for
joiner. Replace adjusted_mode with pipe_mode in pch_panel_fitting function
so that correct value of pipe_src is used once joiner calculation are done.
Also
In panel fitter/pipe scaler scenario the pch_pfit configuration
currently takes place before accounting for pipe_src width for
joiner. This causes issue when pch_pfit and joiner get enabled
together. Call panel_fitting from pipe_config once pipe src is
computed.
-v5: Add GMCH check [Ville]
Signed
Add early pipe src initialization for gmch and later
initialize the pipe src during compute_pipe_src.
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/in
For all encoders add gmch_panel_fitting and remove
pch_panel_fitting as it will be called from pipe_config
after joiner calculation is done.
-v5: Nuke GMCH check from few places [Ville]
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/icl_dsi.c| 4
drivers/gpu/drm/i915/disp
Disable panel fitting if joiner is enabled as
backporting of joiner part is required in case
of pfit.
Signed-off-by: Nemesa Garg
---
drivers/gpu/drm/i915/display/intel_pfit.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c
b/drivers/gpu/drm/i915/
Disable support for odd panning and size in y direction when running
on display version 3x and using semiplanar formats.
Bspec: 68903
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm
== Series Details ==
Series: drm/i915: Fixed NULL pointer dereference in capture_engine
URL : https://patchwork.freedesktop.org/series/141559/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15721 -> Patchwork_141559v1
Summar
== Series Details ==
Series: Fix some races/bugs in GuC engine busyness (rev2)
URL : https://patchwork.freedesktop.org/series/141522/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15721 -> Patchwork_141522v2
Summary
---
== Series Details ==
Series: Fix some races/bugs in GuC engine busyness (rev2)
URL : https://patchwork.freedesktop.org/series/141522/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Move display related shutdown sequences from i915_driver to
intel_display_driver.
No functional change. Just taking the right ownership and
start some reconciliation of them between i915 and Xe.
v2: - Add missing _nogem caller (Imre)
- Fix comment style (Jonathan)
Reviewed-by: Jonathan Cavit
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/display: Move shutdown sequences
under display driver
URL : https://patchwork.freedesktop.org/series/141566/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15721 -> Patchwork_141566v1
=
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/display: Move shutdown sequences
under display driver
URL : https://patchwork.freedesktop.org/series/141566/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be c
== Series Details ==
Series: drm/i915/display: Don't allow odd ypan or ysize with semiplanar format
URL : https://patchwork.freedesktop.org/series/141560/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15721 -> Patchwork_141560v1
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4
drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +
drivers/gpu/drm/x
On Tue, Nov 19, 2024 at 12:23:07AM +, Patchwork wrote:
Patch Details
Series: Fix some races/bugs in GuC engine busyness
URL: [1]https://patchwork.freedesktop.org/series/141522/
State: failure
Details:
[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_141522v1/index.html
Start the xe-i915-display reconciliation by using the same
shutdown sequences.
v2: include the stubs for !CONFIG_DRM_XE_DISPLAY (Kunit)
Reviewed-by: Jonathan Cavitt
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/display/xe_display.c | 46 +++--
drivers/gpu/drm/xe/displa
This aligns with the current i915 display sequence.
Cc: Maarten Lankhort
Reviewed-by: Jonathan Cavitt
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/display/xe_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_display.c
b/driv
When the intel_context structure contains NULL,
it raises a NULL pointer dereference error in drm_info().
This patch aims to resolve issue:
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12309
Signed-off-by: Eugene Kobyak
---
drivers/gpu/drm/i915/i915_gpu_error.c | 10 ++
1 fil
== Series Details ==
Series: drm/i915: MST and DDI cleanups and refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/141500/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15720 -> Patchwork_141500v3
Summary
---
On Mon, Nov 18, 2024 at 08:08:16AM -0700, Nathan Chancellor wrote:
> On Thu, Oct 31, 2024 at 02:41:38PM +0100, Maarten Lankhorst wrote:
> > Cristian Ciocaltea (3):
> > drm/rockchip: Add basic RK3588 HDMI output support
>
> Can someone please apply [1] to resolve a link time failure seen with
Hi Arun,
On Tue, 19 Nov 2024 at 14:39, Murthy, Arun R wrote:
> > On Tue, 19 Nov 2024 at 10:55, Arun R Murthy
> > wrote:
> > > The corresponding mutter changes to enable/disable histogram, read the
> > > histogram data, communicate with the library and write the enhanced
> > > data back to the KM
== Series Details ==
Series: drm/i915: MST and DDI cleanups and refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/141500/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/a
== Series Details ==
Series: drm/i915: MST and DDI cleanups and refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/141500/
State : warning
== Summary ==
Error: dim checkpatch failed
f00cf2e59b11 drm/i915/mst: pass intel_dp around in mst stream helpers
3f2680de11a7 drm/i915/mst:
== Series Details ==
Series: mtd: add driver for Intel discrete graphics (rev3)
URL : https://patchwork.freedesktop.org/series/140306/
State : warning
== Summary ==
Error: dim checkpatch failed
223af897ae85 mtd: add driver for intel graphics non-volatile memory device
-:69: WARNING:FILE_PATH_C
On Tue, 19 Nov 2024, Imre Deak wrote:
> On Mon, Nov 18, 2024 at 04:49:01PM +0200, Jani Nikula wrote:
>> +#define DP_TP_STATUS_STREAMS_ENABLED_MASK REG_GENMASK(21, 19)
>
> I assume the above is the 'Streams Enabled' field and that is bits 18:16
> on the platforms I checked. Bits 21:19 is 'DP Init
== Series Details ==
Series: mtd: add driver for Intel discrete graphics (rev3)
URL : https://patchwork.freedesktop.org/series/140306/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
> On Tue, 19 Nov 2024 at 10:55, Arun R Murthy
> wrote:
> > The corresponding mutter changes to enable/disable histogram, read the
> > histogram data, communicate with the library and write the enhanced
> > data back to the KMD is also pushed for review at
> > https://gitlab.gnome.org/GNOME/mutter/
Enable access to internal non-volatile memory on DGFX
with GSC/CSC devices via a child device.
The nvm child device is exposed via auxiliary bus.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c |
Enable runtime PM in mtd driver to notify graphics driver that
whole card should be kept awake while nvm operations are
performed through this driver.
CC: Lucas De Marchi
Acked-by: Miquel Raynal
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd-intel-dg.c | 70 ++
Implement read(), erase() and write() functions.
CC: Lucas De Marchi
CC: Rodrigo Vivi
Acked-by: Miquel Raynal
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Co-developed-by: Vitaly Lubart
Signed-off-by: Vitaly Lubart
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mt
Check NVM access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/intel_nvm.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
di
Enable access to internal non-volatile memory on
DGFX devices via a child device.
The nvm child device is exposed via auxiliary bus.
CC: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/
GSC NVM controller HW errors on quad access overlapping 1K border.
Align 64bit read and write to avoid readq/writeq over 1K border.
Acked-by: Miquel Raynal
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/mtd-intel-dg.c | 35 ++
1 file changed, 35 insertions(
Register the on-die nvm device with the mtd subsystem.
Refcount nvm object on _get and _put mtd callbacks.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Acked-by: Miquel Raynal
Co-de
In intel-dg, there is no access to the spi controller,
the information is extracted from the descriptor region.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Acked-by: Miquel Raynal
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/mtd/devices/m
Add auxiliary driver for intel discrete graphics
non-volatile memory device.
CC: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Acked-by: Miquel Raynal
Co-developed-by: Tomas Winkler
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
MAINTAINERS| 7 ++
dr
Add driver for access to Intel discrete graphics card
internal NVM device.
Expose device on auxiliary bus by i915 and Xe drivers and
provide mtd driver to register this device with MTD framework.
This is a rewrite of "drm/i915/spi: spi access for discrete graphics"
and "spi: add driver for Intel d
== Series Details ==
Series: drm/i915: intel_display conversions, cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/141176/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15719 -> Patchwork_141176v3
Summary
== Series Details ==
Series: drm/i915: intel_display conversions, cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/141176/
State : warning
== Summary ==
Error: dim checkpatch failed
d05fd1c38fb0 drm/i915/overlay: convert to struct intel_display
-:609: CHECK:LINE_SPACING: Please u
On Tue, 19 Nov 2024, Imre Deak wrote:
> On Mon, Nov 18, 2024 at 04:49:01PM +0200, Jani Nikula wrote:
>> Use the modern style for defining register contents. Expand the status
>> register contents a bit.
>>
>> TODO: The payload mapping fields have more bits on more recent
>> platforms.
>>
>> Sign
On Tue, 19 Nov 2024, Arun R Murthy wrote:
> CRTC properties have been added for enable/disable histogram, reading
> the histogram data and writing the IET data.
> "HISTOGRAM_EN" is the crtc property to enable/disable the global
> histogram and takes a value 0/1 accordingly.
> "Histogram" is a crtc
== Series Details ==
Series: drm/i915: MST and DDI cleanups and refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/141500/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15719 -> Patchwork_141500v2
Summary
---
== Series Details ==
Series: drm/i915: MST and DDI cleanups and refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/141500/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/a
Hi Arun,
On Tue, 19 Nov 2024 at 10:55, Arun R Murthy wrote:
> The corresponding mutter changes to enable/disable histogram, read the
> histogram data, communicate with the library and write the enhanced data
> back to the KMD is also pushed for review at
> https://gitlab.gnome.org/GNOME/mutter/-
== Series Details ==
Series: Display Global Histogram (rev6)
URL : https://patchwork.freedesktop.org/series/135793/
State : warning
== Summary ==
Error: dim checkpatch failed
ea9d7335b8ed drm/i915/histogram: Define registers for histogram
-:13: WARNING:FILE_PATH_CHANGES: added, moved or delete
On Mon, Nov 18, 2024 at 04:49:01PM +0200, Jani Nikula wrote:
> Use the modern style for defining register contents. Expand the status
> register contents a bit.
>
> TODO: The payload mapping fields have more bits on more recent
> platforms.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm
On Mon, Nov 18, 2024 at 04:49:06PM +0200, Jani Nikula wrote:
> Use a temporary variable for DDI mode to simplify the conditions. This
> is in line with the other places that read DDI mode.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 9 +
> 1 file cha
On Tue, 19 Nov 2024, Arun R Murthy wrote:
> Upon enabling histogram an interrupt is trigerred after the generation
> of the statistics. This patch registers the histogram interrupt and
> handles the interrupt.
>
> v2: Added intel_crtc backpointer to intel_histogram struct (Jani)
> Removed hist
Add the register/bit definitions for global histogram.
v2: Intended the register contents, removed unused regs (Jani)
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/intel_histogram_regs.h | 48 +++
1 file changed, 48 insertions(+)
create mode 100644 drivers/gpu/drm/i91
Display histogram is a hardware functionality where a statistics for 'x'
number of frames is generated to form a histogram data. This is notified
to the user via histogram event. Compositor will then upon sensing the
histogram event will read the histogram data from KMD via crtc property.
A library
Histogram added as part of i915/display driver. Adding the same for xe
as well.
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a93e6fcc0ad
The delay counter for histogram does not reset and as a result the
histogram bin never gets updated. Workaround would be to use save and
restore histogram register.
Wa: 14014889975
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 17 +
.../gpu/dr
In Display 20+, new registers are added for setting index, reading
histogram and writing the IET.
v2: Removed duplicate code (Jani)
v3: Moved histogram core changes to earlier patches (Jani/Suraj)
v4: Rebased after addressing comments on patch 1
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915
Enable pipe dithering while enabling histogram to overcome some
atrifacts seen on the screen.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
b/drivers/
CRTC properties have been added for enable/disable histogram, reading
the histogram data and writing the IET data.
"HISTOGRAM_EN" is the crtc property to enable/disable the global
histogram and takes a value 0/1 accordingly.
"Histogram" is a crtc property to read the binary histogram data.
"Global
Upon enabling histogram an interrupt is trigerred after the generation
of the statistics. This patch registers the histogram interrupt and
handles the interrupt.
v2: Added intel_crtc backpointer to intel_histogram struct (Jani)
Removed histogram_wq and instead use dev_priv->unodered_eq (Jani)
Statistics is generated from the image frame that is coming to display
and an event is sent to user after reading this histogram data.
This statistics/histogram is then shared with the user upon getting a
request from user. User can then use this histogram and generate an
enhancement factor. This e
On 11/18/2024 7:14 PM, Juha-Pekka Heikkilä wrote:
These display patches probably should go through i915 ci also since it
changes code on i915.
patch itself look ok,
Reviewed-by: Juha-Pekka Heikkila
Was already tested with i915 CI.
Patch is pushed to drm-intel-next. Thanks JP for the revie
On Tue, 2024-11-19 at 10:51 +0200, Jani Nikula wrote:
> On Tue, 19 Nov 2024, Vinod Govindapillai
> wrote:
> > FBC dirty rect support and PSR2 selective fetch canno be enabled
> > together. In xe3 driver enables the FBC dirty rect feature by
> > default. So PSR2 is enabled, then mark that plane as
On Tue, 19 Nov 2024, Vinod Govindapillai wrote:
> FBC dirty rect support and PSR2 selective fetch canno be enabled
> together. In xe3 driver enables the FBC dirty rect feature by
> default. So PSR2 is enabled, then mark that plane as FBC cannot
> be enabled. Later on we need to find a way to selec
> -Original Message-
> From: Hogander, Jouni
> Sent: Thursday, November 14, 2024 3:11 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: Nikula, Jani ; Garg, Nemesa
>
> Subject: Re: [PATCH v2] drm/i915/psr: Disable psr1 if setup_time > vblank
>
> On Tue, 2024-11-05 at
== Series Details ==
Series: drm/i915/dp_mst: Fix connector initialization in
intel_dp_add_mst_connector() (rev2)
URL : https://patchwork.freedesktop.org/series/141495/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15717 -> Patchwork_141495v2
=
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