On LunarLake and onwards we are using vrr send push mechanism to trigger
frame change event. Due to this we need to trigger it using
intel_vrr_psr_send_push provided by VRR code on legacy cursor update.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_cursor.c | 5 +
1 fi
Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR
usage.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
b/drivers/gpu/drm/i915/display/intel_v
Add own interface for PSR usage to perform push on frontbuffer tracking
invalidate and flush call backs. Use this new interface from PSR code.
v2:
- use crtc->trans_push_enabled instead of rmw
- intel_vrr_psr_send_push takes struct intel_crtc * and enum transcoder
as a parameter
Signed-of
Currently we are using "automatic" frame change event generation. The
event is generated by any access to plane or pipe registers.
We have option to use "PSR PR Frame Change Enable" bit in TRANS_PUSH
register to enable frame change event generation on trans push. When
this bit is set "automatic" f
psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2
HW tracking and PSR2 selective fetch. Due to this rename it as
psr_force_exit.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
There is unnecessary complexity in frontbuffer tracking invalidate and
flush callbacks. Simplify them a bit with some minor changes to sequences:
Invalidate:
1. Additionally write single full frame bit when selective fetch is
enabled. This should be ok as continuous full frame bit is already set.
In Lunarlake and onwards it is possible to generate "PSR frame change"
event using TRANS_PUSH mechanism. Implement function to enable this and
take PSR into account in intel_vrr_send_push.
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
Signed-off-by: Jouni Högander
---
drivers/gp
Currently vrr code is overwriting possibly set PSR PR Frame Change Enable
bit in TRANS_PUSH register. Avoid this by adding trans_push_enabled into
struct intel_crtc and use that when writing TRANS_PUSH register.
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
Signed-off-by: Jouni Hö
On Tue, Oct 29, 2024 at 10:51:34AM +0100, Christian König wrote:
> Am 25.10.24 um 10:48 schrieb Raag Jadav:
> > Add documentation for device wedged event in a new 'Device wedging'
> > chapter. The describes basic definitions and consumer expectations
> > along with an example.
> >
> > v8: Improve
== Series Details ==
Series: drm/i915/cdclk: Declutter CDCLK code (rev2)
URL : https://patchwork.freedesktop.org/series/140697/
State : warning
== Summary ==
Error: dim checkpatch failed
d8c52943046e drm/i915: Introduce HAS_DOUBLE_WIDE()
2baaa2d9b614 drm/i915/cdclk: Extract intel_cdclk_guardba
> -Original Message-
> From: Jadav, Raag
> Sent: Thursday, 31 October 2024 14.55
> To: Kahola, Mika
> Cc: intel-gfx@lists.freedesktop.org; Sousa, Gustavo ;
> jani.nik...@linux.intel.com
> Subject: Re: [PATCH v3 1/2] drm/i915/xe3lpd: Power request
> asserting/deasserting
>
> On Thu, Oct 3
On Thu, Oct 31, 2024 at 05:12:47PM +0200, Abel Vesa wrote:
> LTTPRs operating modes are defined by the DisplayPort standard and the
> generic framework now provides a helper to switch between them.
> So use the drm generic helper instead as it makes the code a bit cleaner.
>
> Signed-off-by: Abel
On Thu, Oct 31, 2024 at 05:12:45PM +0200, Abel Vesa wrote:
> According to the DisplayPort standard, LTTPRs have two operating
> modes:
> - non-transparent - it replies to DPCD LTTPR field specific AUX
>requests, while passes through all other AUX requests
> - transparent - it passes through a
On Thu, Oct 31, 2024 at 09:55:20AM +, Govindapillai, Vinod wrote:
> The reported regressions and warnings are not related to this patch.
>
> So could merge this once this patch is RB-ed
Applied to drm-intel-next. Thanks for the patch and review.
Matt
>
> BR
> Vinod
>
> On Thu, 2024-10-3
Let's start using struct intel_display instead of struct drm_i915_private
when introducing new code. No functional changes.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_tc.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/dr
On Thu, Oct 31, 2024 at 01:38:33PM +0200, Jani Nikula wrote:
> The __to_intel_display() generics require the definition of struct
> drm_i915_private i.e. inclusion of i915_drv.h. Add
> intel_display_conversion.c with a __i915_to_display() function to do the
> conversion without the intel_display_co
On Thu, 31 Oct 2024, Raag Jadav wrote:
> On Thu, Oct 31, 2024 at 01:38:33PM +0200, Jani Nikula wrote:
>> The __to_intel_display() generics require the definition of struct
>> drm_i915_private i.e. inclusion of i915_drv.h. Add
>> intel_display_conversion.c with a __i915_to_display() function to do
From: Ville Syrjälä
We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers
during an upcoming MBUS sanitation stage. To make that easier
extract a helper that computes the full register value for us.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_watermark.c | 63 ++
> -Original Message-
> From: Intel-gfx On Behalf Of Vinod
> Govindapillai
> Sent: Wednesday, 30 October 2024 12.33
> To: intel-gfx@lists.freedesktop.org
> Cc: Govindapillai, Vinod ; Shankar, Uma
> ; Nikula, Jani
> Subject: [PATCH v7] drm/i915: Implement Dbuf overlap detection feature
> s
On Fri, Oct 25, 2024 at 10:12:43PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Write source OUI for non-eDP sinks (rev4)
> URL : https://patchwork.freedesktop.org/series/140061/
> State : failure
Thanks for the reviews, patchset is pushed to drm-intel-next.
The failure
On Thu, Oct 31, 2024 at 05:12:48PM +0200, Abel Vesa wrote:
> Link Training Tunable PHY Repeaters (LTTPRs) are defined in DisplayPort
> 1.4a specification. As the name suggests, these PHY repeaters are
> capable of adjusting their output for link training purposes.
>
> The msm DP driver is currentl
== Series Details ==
Series: drm/i915/cdclk: Declutter CDCLK code (rev2)
URL : https://patchwork.freedesktop.org/series/140697/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> On ADLP+ during modeset disabling, disable the DP2 configuration for MST
> master transcoders as required by the specification.
>
> Bspec: 55424, 54128, 65448, 68849
Just curious how this change is related to so many bspecs...?
> Signed-off-
On Thu, Oct 31, 2024 at 05:12:46PM +0200, Abel Vesa wrote:
> LTTPRs operating modes are defined by the DisplayPort standard and the
> generic framework now provides a helper to switch between them.
> So use the drm generic helper instead as it makes the code a bit cleaner.
>
> Signed-off-by: Abel
From: Ville Syrjälä
If the system boots with MBUS joining enabled but we disable
the relevant pipe during sanitaion we later get into trouble
as the rest of the code doesn't expect MBUS joining to be
enabled unless the set of active pipes is in agreement.
We could relax some of the MBUS joining
From: Ville Syrjälä
We'll be wanting reprogram the PIPE_MBUS_DBOX_CTL registers
during an upcoming MBUS sanitation stage. Extract the reprogramming
loop into a helper that doesn't depend on the full atomic state
so that it can be reused.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/di
From: Ville Syrjälä
Implement xelpdp_is_only_pipe_per_dbuf_bank() in a slightly
more straightforward way.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/
From: Ville Syrjälä
In order to add more MBUS sanitation into the code we'll want
to reuse a bunch of the code that performs the MBUS/related
hardware programming. Currently that code comes after the
main skl_wm_get_hw_state_and_sanitize() entrypoint. In order
to avoid annoying forward declaratio
From: Ville Syrjälä
We'll be wanting reprogram the MBUS_CTL register during an
upcoming MBUS sanitation stage. Extract the reprogramming
into a helper that doesn't depend on the full atomic state
so that it can be reused.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_waterm
From: Ville Syrjälä
Sanitize MBUS joining in case the BIOS enabled it with
not active pipes, or we disabled the only active pipe
eg. due to intel_crtc_needs_link_reset().
Ville Syrjälä (6):
drm/i915: Relocate the SKL wm sanitation code
drm/i915: Extract pipe_mbus_dbox_ctl()
drm/i915: Extra
On Wed, Oct 30, 2024 at 01:05:25AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/scaler: Scaler code cleanups
> URL : https://patchwork.freedesktop.org/series/140694/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_15607 -> Patchwork_140694v1
> ==
== Series Details ==
Series: drm/i915/display: make all i915_drv.h includes explicit
URL : https://patchwork.freedesktop.org/series/140764/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/guc: Flush ct receive tasklet during reset preparation (rev2)
URL : https://patchwork.freedesktop.org/series/140741/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15619 -> Patchwork_140741v2
On 10/31/24 9:14 AM, Nam Cao wrote:
> The IORING_OP_TIMEOUT command uses hrtimer underneath. The timer's callback
> function is setup in io_timeout(), and then the callback function is setup
> again when the timer is rearmed.
>
> Since the callback function is the same for both cases, the latter s
On Thu, Oct 31, 2024 at 04:50:20PM +0200, Raag Jadav wrote:
> On Thu, Oct 31, 2024 at 07:59:16PM +0530, Kahola, Mika wrote:
>
> ...
>
> > > > +static void wa_14020908590(struct intel_display *display,
> > > > + bool enable)
> > >
> > > Can be one line?
> >
> > Could be.
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting
URL : https://patchwork.freedesktop.org/series/140766/
State : warning
== Summary ==
Error: dim checkpatch failed
392683beeeaa drm/i915/xe3lpd: Power request asserting/deasserting
-:49: WARNING:LONG_LINE: line l
On Thu, Oct 31, 2024 at 07:58:19PM +0530, Kahola, Mika wrote:
> > -Original Message-
> > From: Jadav, Raag
> > Sent: Thursday, 31 October 2024 14.59
> > To: Kahola, Mika
> > Cc: intel-gfx@lists.freedesktop.org; Sousa, Gustavo
> > ;
> > jani.nik...@linux.intel.com
> > Subject: Re: [PATCH
Hi Dave, Sima,
this is the week's PR for drm-misc-fixes.
Best regards
Thomas
drm-misc-fixes-2024-10-31:
Short summary of fixes pull:
ivpu:
- Fix firewall IRQ handling
panthor:
- Fix firmware initialization wrt page sizes
- Fix handling and reporting of dead job groups
sched:
- Guarantee forwa
On Thu, Oct 31, 2024 at 07:59:16PM +0530, Kahola, Mika wrote:
...
> > > +static void wa_14020908590(struct intel_display *display,
> > > +bool enable)
> >
> > Can be one line?
>
> Could be. This should fit within expected line length.
With that,
Reviewed-by: Raag Jadav
== Series Details ==
Series: drm/i915/color: Stop using non-posted DSB writes for legacy LUT (rev2)
URL : https://patchwork.freedesktop.org/series/140739/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15619 -> Patchwork_140739v2
> -Original Message-
> From: Jadav, Raag
> Sent: Thursday, 31 October 2024 14.59
> To: Kahola, Mika
> Cc: intel-gfx@lists.freedesktop.org; Sousa, Gustavo ;
> jani.nik...@linux.intel.com
> Subject: Re: [PATCH v3 0/2] drm/i915/display: Power request
> asserting/deasserting
>
> On Thu, Oct
== Series Details ==
Series: drm/i915/cdclk: Declutter CDCLK code (rev2)
URL : https://patchwork.freedesktop.org/series/140697/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15619 -> Patchwork_140697v2
Summary
---
**
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting
URL : https://patchwork.freedesktop.org/series/140766/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/a
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting
URL : https://patchwork.freedesktop.org/series/140766/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15619 -> Patchwork_140766v1
Summary
---
Hi Andi,
thanks for review!
> > Commit 255fc1703e42 ("drm/i915/gem: Calculate object page offset for
> > partial memory mapping") introduced a new offset that is compared to
> > sg_dma_len(r.sgt.sgp) in remap_io_sg() function. However, later in
> > remap_sg() the offset (which at that point reside
On (24/10/31 13:33), Jani Nikula wrote:
> > intel_ddi_init() may skip connector initialization, for instance,
> > both intel_ddi_init_dp_connector() and intel_ddi_init_hdmi_connector()
> > are optional. This leads to situation that ->attached_connector may
> > be NULL for some connectors. For ins
Hi Dave, Simona,
drm-misc-next-2024-10-31:
drm-misc-next for v6.13:
All of the previous pull request, with MORE!
Core Changes:
- Update documentation for scheduler start/stop and job init.
- Add dedede and sm8350-hdk hardware to ci runs.
Driver Changes:
- Small fixes and cleanups to panfrost,
== Series Details ==
Series: drm/i915/display: make all i915_drv.h includes explicit
URL : https://patchwork.freedesktop.org/series/140764/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15618 -> Patchwork_140764v1
Summary
-
== Series Details ==
Series: drm: i915: do not NULL deref hdmi attached_connector
URL : https://patchwork.freedesktop.org/series/140761/
State : warning
== Summary ==
Error: dim checkpatch failed
e22e68343ed1 drm: i915: do not NULL deref hdmi attached_connector
-:110: WARNING:MISSING_FIXES_TAG
On Wed, Oct 30, 2024 at 08:39:31PM +0200, Jani Nikula wrote:
> On Wed, 30 Oct 2024, Raag Jadav wrote:
> > G8 power state entry is disabled due to a limitation on DG2, so we
> > enable it from driver with Wa_14022698537. For now we enable it for
> > all DG2 devices with the exception of a few, for
On Thu, Oct 31, 2024 at 01:40:25PM +0200, Mika Kahola wrote:
> There is a HW issue that arises when there are race conditions
> between TCSS entering/exiting TC7 or TC10 states while the
> driver is asserting/deasserting TCSS power request. As a
> workaround, Display driver will implement a mailbox
The i915_reg_rw tracing is a small isolated part of i915_trace.h. Its
users are orthogonal to the other i915_trace.h users as well, and its
implementation does not require all the includes of i915_trace.h. Split
i915_reg_rw tracing to separate intel_uncore_trace.[ch].
The main underlying goal is t
Drop all implicit includes of i915_drv.h via other headers in display
code, and make the includes explicit.
With this, we can use:
$ git grep '#include "i915_drv.h"' -- drivers/gpu/drm/i915/display/
to track the progress of struct drm_i915_private -> struct intel_display
conversion, and in gener
The long term goal is to remove the __to_intel_display() generics from
display macros, such as register macros. This requires that all such
macro usage passes struct intel_display * rather than struct
drm_i915_private * to the macros.
The short term goal is to hide the struct drm_i915_private acce
On Thu, Oct 31, 2024 at 01:40:26PM +0200, Mika Kahola wrote:
> There is a HW issue that arises when there are race conditions
> between TCSS entering/exiting TC7 or TC10 states while the
> driver is asserting/deasserting TCSS power request. As a
> workaround, Display driver will implement a mailbox
On Thu, 2024-10-31 at 07:58 +, Govindapillai, Vinod wrote:
> On Wed, 2024-10-30 at 12:55 -0700, Clint Taylor wrote:
> > Starting with display version 13 the fuse bit to disable Display PM has
> > been removed.
> >
> > v2: Bit removed starting with display version 13 (MattR)
> > v3: DG2 still u
On Thu, Oct 31, 2024 at 02:36:37PM +0200, Jani Nikula wrote:
> On Wed, 30 Oct 2024, Imre Deak wrote:
> > Add a way to disable the DP2 configuration, required by the next patch
> > during transcoder disabling.
> >
> > While at it drop the redundant encoder parameter.
> >
> > v2:
> > - Keep intel_dd
On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> On ADLP+ during modeset enabling configure the DDI function without
> enabling it for MST slave transcoders before programming the data and
> link M/N values. The DDI function gets enabled separately later in the
> transcoder enabling sequence.
On Wed, 30 Oct 2024, Imre Deak wrote:
> Add a way to disable the DP2 configuration, required by the next patch
> during transcoder disabling.
>
> While at it drop the redundant encoder parameter.
>
> v2:
> - Keep intel_ddi_config_transcoder_dp2() static. (Jani)
> - Remove the encoder parameter.
>
On Thu, Oct 31, 2024 at 09:47:39AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/color: Stop using non-posted DSB writes for legacy LUT
> URL : https://patchwork.freedesktop.org/series/140739/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_15615_
== Series Details ==
Series: drm/i915/display: make all i915_drv.h includes explicit
URL : https://patchwork.freedesktop.org/series/140764/
State : warning
== Summary ==
Error: dim checkpatch failed
76dd21274c35 drm/i915/gvt: always pass struct intel_display * to register macros
-:448: CHECK:M
== Series Details ==
Series: drm: i915: do not NULL deref hdmi attached_connector
URL : https://patchwork.freedesktop.org/series/140761/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15618 -> Patchwork_140761v1
Summary
On Thu, Oct 31, 2024 at 12:49:22PM +0200, Luca Coelho wrote:
> On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> > On ADLP+ during modeset enabling configure the DDI function without
> > enabling it for MST slave transcoders before programming the data and
> > link M/N values. The DDI function
Hi, Dave, Simona
This week's drm-xe-next pull request, including also the
changes that we decided not to pull last week.
Note that this PR introduces a run-time warning when flushing
xe workqueues. That is fixed by the patch
746ae46c11137ba21f0c0c68f082a9d8c1222c78
currently present in drm-misc-f
There is a HW issue that arises when there are race conditions
between TCSS entering/exiting TC7 or TC10 states while the
driver is asserting/deasserting TCSS power request. As a
workaround, Display driver will implement a mailbox sequence
to ensure that the TCSS is in TC0 when TCSS power request i
There is a HW issue that arises when there are race conditions
between TCSS entering/exiting TC7 or TC10 states while the
driver is asserting/deasserting TCSS power request. As a
workaround, Display driver will implement a mailbox sequence
to ensure that the TCSS is in TC0 when TCSS power request i
On Thu, 31 Oct 2024, Sergey Senozhatsky wrote:
> *** RFC ***
>
> intel_ddi_init() may skip connector initialization, for instance,
> both intel_ddi_init_dp_connector() and intel_ddi_init_hdmi_connector()
> are optional. This leads to situation that ->attached_connector may
> be NULL for som
Add a __drm_to_display() conversion function to hide the to_i915() usage
and the implicit dependency on i915_drv.h from intel_display_types.h.
The goal is for this implementation to be a transitional helper
only. One idea I've floated around in the past would be to require a
struct intel_display p
Add to_intel_uncore() function to avoid the inclusion of i915_drv.h from
intel_de.h. This reveals a number of implicit dependencies on i915_drv.h
that need to be added.
For now, to_intel_uncore() can be an inline function, with all the
includes in compat intel_uncore.h, as long as i915_drv.h isn't
Finish the job of removing implicit dependencies on i915_drv.h via other
includes in display code. Add a few missing explicit includes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 1 +
drivers/gpu/drm/i915/display/intel_crtc.c | 1 +
drivers/gpu/d
The __to_intel_display() generics require the definition of struct
drm_i915_private i.e. inclusion of i915_drv.h. Add
intel_display_conversion.c with a __i915_to_display() function to do the
conversion without the intel_display_conversion.h having an implicit
dependency on i915_drv.h.
The long ter
On Thu, 2024-10-31 at 12:57 +0200, Imre Deak wrote:
> On Thu, Oct 31, 2024 at 12:44:38PM +0200, Luca Coelho wrote:
> > On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> > > On PTL during modeset enabling configure the DDI function without
> > > enabling it for MST slave transcoders before progr
On Thu, Oct 31, 2024 at 12:56:15PM +0200, Luca Coelho wrote:
> On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> > On ADLP+ during modeset disabling, disable the DP2 configuration for MST
> > master transcoders as required by the specification.
> >
> > Bspec: 55424, 54128, 65448, 68849
>
> Ju
On Thu, Oct 31, 2024 at 11:27:05AM +0200, Jani Nikula wrote:
> On Thu, 31 Oct 2024, Raag Jadav wrote:
> > On Wed, Oct 30, 2024 at 08:39:31PM +0200, Jani Nikula wrote:
> > > On Wed, 30 Oct 2024, Raag Jadav wrote:
> > > > G8 power state entry is disabled due to a limitation on DG2, so we
> > > > en
*** RFC ***
intel_ddi_init() may skip connector initialization, for instance,
both intel_ddi_init_dp_connector() and intel_ddi_init_hdmi_connector()
are optional. This leads to situation that ->attached_connector may
be NULL for some connectors. For instance, on my setup 'DDI A/PHY A'
an
On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> Add a way to disable the DP2 configuration, required by the next patch
> during transcoder disabling.
>
> While at it drop the redundant encoder parameter.
>
> v2:
> - Keep intel_ddi_config_transcoder_dp2() static. (Jani)
> - Remove the encode
On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> On ADLP+ during modeset enabling and disabling, enable and disable the DP2
> configuration for MST slave transcoders as required by the specification.
>
> Update the documentation of intel_ddi_config_transcoder_func() /
> intel_ddi_disable_tran
On Thu, Oct 31, 2024 at 12:44:38PM +0200, Luca Coelho wrote:
> On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> > On PTL during modeset enabling configure the DDI function without
> > enabling it for MST slave transcoders before programming the data and
> > link M/N values. The DDI function ge
On Wed, 2024-10-30 at 21:23 +0200, Imre Deak wrote:
> On PTL during modeset enabling configure the DDI function without
> enabling it for MST slave transcoders before programming the data and
> link M/N values. The DDI function gets enabled separately later in the
> transcoder enabling sequence.
>
== Series Details ==
Series: drm/i915/psr: Disable Panel Replay as well if VRR is enabled
URL : https://patchwork.freedesktop.org/series/140754/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15616 -> Patchwork_140754v1
Summ
On Thu, 31 Oct 2024, Raag Jadav wrote:
> On Wed, Oct 30, 2024 at 08:39:31PM +0200, Jani Nikula wrote:
>> On Wed, 30 Oct 2024, Raag Jadav wrote:
>> > G8 power state entry is disabled due to a limitation on DG2, so we
>> > enable it from driver with Wa_14022698537. For now we enable it for
>> > all
On Wed, Oct 30, 2024 at 08:40:50PM +0200, Jani Nikula wrote:
> On Wed, 30 Oct 2024, Raag Jadav wrote:
> > This series implements Wa_14022698537 for DG2 along with its prerequisites
> > in i915. Now that we have a common pciids.h in place, this can be extended
> > to xe as well. Detailed descriptio
mov$0x77,%eax
11: cd 80 int$0x80
13: 90 nop
14: 8d .byte 0x8d
15: 76 .byte 0x76
The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20241031/202410311530.
Having Panel Replay enabled together with VRR is causing following errors:
xe :00:02.0: [drm] *ERROR* Timed out waiting PSR idle state
xe :00:02.0: [drm] *ERROR* Fault errors on pipe A: 0x0080
xe :00:02.0: [drm] *ERROR* CPU pipe A FIFO underrun
xe :00:02.0: [drm] *ERROR* Fault
On Wed, 2024-10-30 at 12:55 -0700, Clint Taylor wrote:
> Starting with display version 13 the fuse bit to disable Display PM has
> been removed.
>
> v2: Bit removed starting with display version 13 (MattR)
> v3: DG2 still uses this fuse bit (MattR)
>
> BSPEC: 50075, 69464
> Cc: Matt Roper
> Sign
On Wed, 2024-10-30 at 12:55 -0700, Clint Taylor wrote:
> Starting with display version 13 the fuse bit to disable Display PM
> has
> been removed.
>
> v2: Bit removed starting with display version 13 (MattR)
> v3: DG2 still uses this fuse bit (MattR)
>
> BSPEC: 50075, 69464
> Cc: Matt Roper
> Si
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