Retry the first read and write to downstream at least 10 times
with a 50ms delay if not hdcp2 capable(dock decides to stop advertising
hdcp2 capability for some reason). The reason being that
during suspend resume Dock usually keep the HDCP2 registers inaccesible
causing AUX error. This wouldn't be
== Series Details ==
Series: series starting with [v1,1/1] drm/i915/gt: Use IS_ENABLED() instead of
defined() on config check
URL : https://patchwork.freedesktop.org/series/138914/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15441 -> Patchwork_138914v1
=
Update the documentation to specify linking to a relevant GitLab
issue or email report for each new flake entry. Added specific
GitLab issue urls for i915, msm and amdgpu driver.
Acked-by: Abhinav Kumar # msm
Acked-by: Dmitry Baryshkov # msm
Signed-off-by: Vignesh Raman
---
v2:
- Add gitlab is
On 9/26/2024 12:44 PM, Suraj Kandpal wrote:
Retry the first read and write to downstream at least 10 times
with a 50ms delay if not hdcp2 capable(dock decides to stop advertising
hdcp2 capability for some reason). The reason being that
during suspend resume Dock usually keep the HDCP2 registers
Previous patch series link -
https://patchwork.freedesktop.org/series/135629/
https://patchwork.freedesktop.org/series/135851/
Animesh Manna (3):
drm/i915/vrr: Split vrr-compute-config in two phases
drm/i915/panelreplay: Panel replay workaround with VRR
drm/i915/display: Introduve intel_vrr_
Add a separate function to check if vrr possible or not
using vrr.flipline variable.
Suggested-by: Ville Syrjälä
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 11 +--
drivers/gpu/drm/i915/display/int
Panel Replay VSC SDP not getting sent when VRR is enabled
and W1 and W2 are 0. So Program Set Context Latency in
TRANS_SET_CONTEXT_LATENCY register to at least a value of 1.
The same is applicable for PSR1/PSR2 as well.
HSD: 14015406119
v1: Initial version.
v2: Update timings stored in adjusted_m
As vrr guardband calculation is dependent on modified
vblank start so better to compute late after all
vblank adjustement.
v1: Initial version.
v2: Split in a separate patch from panel-replay workaround. [Ankit]
v3: Add a function for late vrr related computation. [Ville]
v4: Use flipline instead
== Series Details ==
Series: drm/i915/pm: Clean up the hibernate vs. PCI D3 quirk
URL : https://patchwork.freedesktop.org/series/139097/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_139097v1
Summary
== Series Details ==
Series: drm/i915/display: Workaround for odd panning for planar yuv (rev4)
URL : https://patchwork.freedesktop.org/series/136416/
State : warning
== Summary ==
Error: dim checkpatch failed
154cf770d0c8 drm/i915/display: Workaround for odd panning for planar yuv
-:37: CHECK
== Series Details ==
Series: drm/i915/display: Workaround for odd panning for planar yuv (rev4)
URL : https://patchwork.freedesktop.org/series/136416/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_136416v4
== Series Details ==
Series: Consider joiner calculation for panel fitting (rev4)
URL : https://patchwork.freedesktop.org/series/136561/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_136561v4
Summary
== Series Details ==
Series: Some correction in the DP Link Training sequence (rev3)
URL : https://patchwork.freedesktop.org/series/139027/
State : warning
== Summary ==
Error: dim checkpatch failed
e456c1053e15 drm/i915/dp: use fsleep instead of usleep_range for LT
-:12: WARNING:BAD_SIGN_OFF:
== Series Details ==
Series: Reduce SHPD_FILTER_CNT value (rev3)
URL : https://patchwork.freedesktop.org/series/138743/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_138743v3
Summary
---
**SUCCESS*
== Series Details ==
Series: Consider joiner calculation for panel fitting (rev4)
URL : https://patchwork.freedesktop.org/series/136561/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/as
== Series Details ==
Series: Reconcile i915's and xe's display power mgt sequences
URL : https://patchwork.freedesktop.org/series/139062/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_139062v1
Summary
---
== Series Details ==
Series: Some correction in the DP Link Training sequence (rev3)
URL : https://patchwork.freedesktop.org/series/139027/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_139027v3
Summary
-
== Series Details ==
Series: Reconcile i915's and xe's display power mgt sequences
URL : https://patchwork.freedesktop.org/series/139062/
State : warning
== Summary ==
Error: dim checkpatch failed
f04353bed085 drm/i915: Remove vga and gmbus seq out of i915_restore_display
5ede27eb97ba drm/i915
== Series Details ==
Series: Reconcile i915's and xe's display power mgt sequences
URL : https://patchwork.freedesktop.org/series/139062/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/hdcp: fix connector refcounting
URL : https://patchwork.freedesktop.org/series/139057/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15451 -> Patchwork_139057v1
Summary
---
**FAI
On 9/26/2024 12:06 AM, Vignesh Raman wrote:
Update the documentation to require linking to a relevant GitLab
issue for each new flake entry instead of an email report. Added
specific GitLab issue URLs for i915, xe and other drivers.
Signed-off-by: Vignesh Raman
---
v2:
- Add gitlab issue li
== Series Details ==
Series: drm: Provide client setup helper and convert drivers (rev5)
URL : https://patchwork.freedesktop.org/series/137389/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/137389/revisions/5/mbox/ not
applied
Applying: drm/fbdev
On Thu, Sep 26, 2024 at 12:56:34PM +0530, Ankit Nautiyal wrote:
> Add compressed bpp limitations for ultrajoiner.
>
> v2: Fix the case for 1 pipe. (Ankit)
>
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 27 +++--
> 1 file changed, 21 inser
On Wed, Sep 18, 2024 at 08:35:44PM +0300, Jani Nikula wrote:
> A number of places rely on the magic -1 to denote
> INTEL_WAKEREF_DEF. Switch to the macro. Define it for xe as well.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c| 2 +-
> drivers/
On Wed, Sep 18, 2024 at 08:35:48PM +0300, Jani Nikula wrote:
> For intel_wakeref_t, opaque is reasonable, but disguising the underlying
> struct ref_tracker * as an unsigned long is not so great. Update the
> typedef to remove one level of disguise.
>
> Although the kernel coding style strongly di
On Wed, Sep 18, 2024 at 08:35:47PM +0300, Jani Nikula wrote:
> Use explicit casts to convert between intel_wakeref_t and unsigned long,
> to not rely on intel_wakeref_t underlying type remaining unsigned long,
> allowing us to change it as needed. (And yes, this is indeed preparation
> for changing
On Wed, Sep 18, 2024 at 08:35:46PM +0300, Jani Nikula wrote:
> Add a dedicated macro for the special mock gt wakeref value, with a cast
> to intel_wakeref_t, instead of assuming you can assign or compare the
> wakeref to -ENODEV directly.
>
> Arguably the whole thing is a hack that should not exis
On Thu, Sep 26, 2024 at 06:41:17PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 26, 2024 at 10:43:21AM -0400, Rodrigo Vivi wrote:
> > On Wed, Sep 25, 2024 at 05:45:22PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > driver/pci does the pci_save_state()+pci_set_power_state() from t
On Wed, Sep 18, 2024 at 08:35:45PM +0300, Jani Nikula wrote:
> We can use 0 for intel_wakeref_t, but not false. Fix it.
>
> Reported-by: kernel test robot
> Closes:
> https://lore.kernel.org/oe-kbuild-all/202409190032.zchbxk9e-...@intel.com/
my bad, sorry!
Reviewed-by: Rodrigo Vivi
> Signed-
On Wed, Sep 18, 2024 at 08:35:43PM +0300, Jani Nikula wrote:
> CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND is an int, defaulting to 250. When
> the wakeref is non-zero, it's either -1 or a dynamically allocated
> pointer, depending on CONFIG_DRM_I915_DEBUG_RUNTIME_PM. It's likely that
> the code works by
Hi Dave, Simona,
Another pull request for v6.13, to keep up with the huge rate of
changes. :-)
Forgot to mention in the summary that Louis Chauvet is taking over from
Rodrigo Siqueira as vkmms maintainer, sorry about that!
Cheers,
Maarten
drm-misc-next-2024-09-26:
drm-misc-next for v6.13:
== Series Details ==
Series: drm/i915/guc: Enable PXP GuC autoteardown flow (rev3)
URL : https://patchwork.freedesktop.org/series/138337/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15449 -> Patchwork_138337v3
Summary
---
On Thu, Sep 26, 2024 at 07:57:48PM +0300, Jani Nikula wrote:
> Define register offset triplets for all registers used with
> GEN8_IRQ_RESET_NDX() and GEN8_IRQ_INIT_NDX() macros, and call the
> underlying gen3_irq_reset() and gen3_irq_init() functions
> directly. Remove the macros, along with the ma
== Series Details ==
Series: drm/i915/guc: Enable PXP GuC autoteardown flow (rev3)
URL : https://patchwork.freedesktop.org/series/138337/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Miscelaneous fixes for display tracepoints (rev2)
URL : https://patchwork.freedesktop.org/series/137978/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15449 -> Patchwork_137978v2
Summary
---
On Thu, Sep 26, 2024 at 10:43:21AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 25, 2024 at 05:45:22PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > driver/pci does the pci_save_state()+pci_set_power_state() from the
> > _noirq() pm hooks. Move our manual calls (needed for the hibernate
== Series Details ==
Series: Miscelaneous fixes for display tracepoints (rev2)
URL : https://patchwork.freedesktop.org/series/137978/
State : warning
== Summary ==
Error: dim checkpatch failed
4afc5faab7c8 drm/i915/display: Fix out-of-bounds access in pipe-related
tracepoints
-:19: WARNING:CO
On Thu, Sep 26, 2024 at 07:57:47PM +0300, Jani Nikula wrote:
> Define register offset triplets for all registers used with
> GEN3_IRQ_RESET() and GEN3_IRQ_INIT() macros, and call the underlying
> gen3_irq_reset() and gen3_irq_init() functions directly. Remove the
> macros, along with the macro name
On Thu, Sep 26, 2024 at 07:57:46PM +0300, Jani Nikula wrote:
> Add struct i915_irq_regs to hold IMR/IER/IIR register offsets to pass to
> gen3_irq_reset() and gen3_irq_init(). This helps in grouping the
> registers and further cleanup.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/
On Tue, Sep 24, 2024 at 01:04:51PM +0530, Suraj Kandpal wrote:
> Reduce SHPD_CNT to 250us for ICL and above as it lines up
> with DP1.4a(Table3-4) spec.
>
> --v2
> -Update commit message and comment [Matt]
>
> --v3
> -drop condition and use value of 250us for ICL and above [Matt]
>
> Signed-off-
== Series Details ==
Series: drm/i915/bios: Refactor ROM access (rev2)
URL : https://patchwork.freedesktop.org/series/138477/
State : warning
== Summary ==
Error: dim checkpatch failed
8b4f246ee508 drm/i915/bios: Use drm_dbg_kms() consistently
a487ab653835 drm/i915/bios: Add some size checks t
On Wed, Sep 25, 2024 at 02:28:42PM -0500, Bjorn Helgaas wrote:
> On Wed, Sep 25, 2024 at 05:45:21PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > On some older laptops i915 needs to leave the GPU in
> > D0 when hibernating the system, or else the BIOS
> > hangs somewhere. Currently
== Series Details ==
Series: drm/i915/bios: Refactor ROM access (rev2)
URL : https://patchwork.freedesktop.org/series/138477/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15448 -> Patchwork_138477v2
Summary
---
**SU
== Series Details ==
Series: drm/i915/bios: Refactor ROM access (rev2)
URL : https://patchwork.freedesktop.org/series/138477/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:
== Series Details ==
Series: drm/i915/hdmi: Convert comma to semicolon
URL : https://patchwork.freedesktop.org/series/138988/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15448 -> Patchwork_138988v1
Summary
---
**SU
== Series Details ==
Series: drm/display/dsc: Refactor MST DSC Determination Policy
URL : https://patchwork.freedesktop.org/series/138989/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/138989/revisions/1/mbox/ not
applied
Applying: drm/display/ds
Define register offset triplets for all registers used with
GEN8_IRQ_RESET_NDX() and GEN8_IRQ_INIT_NDX() macros, and call the
underlying gen3_irq_reset() and gen3_irq_init() functions
directly. Remove the macros, along with the macro name concatenation
hackery.
Signed-off-by: Jani Nikula
---
...
Add struct i915_irq_regs to hold IMR/IER/IIR register offsets to pass to
gen3_irq_reset() and gen3_irq_init(). This helps in grouping the
registers and further cleanup.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 31 ++-
drivers/gpu/drm/i915/i91
Define register offset triplets for all registers used with
GEN3_IRQ_RESET() and GEN3_IRQ_INIT() macros, and call the underlying
gen3_irq_reset() and gen3_irq_init() functions directly. Remove the
macros, along with the macro name concatenation hackery.
Signed-off-by: Jani Nikula
---
.../gpu/drm
Add a struct to hold IMR/IER/IIR registers, and pass them together
instead of the ugly macro hacks with macro name concatenation etc.
BR,
Jani.
Jani Nikula (3):
drm/i915/irq: add struct i915_irq_regs triplet
drm/i915/irq: remove GEN3_IRQ_RESET() and GEN3_IRQ_INIT() macros
drm/i915/irq: remo
== Series Details ==
Series: drm/i915/hdmi: Convert comma to semicolon
URL : https://patchwork.freedesktop.org/series/138988/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
On Thu, Sep 26, 2024 at 06:36:13PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 26, 2024 at 10:48:41AM -0400, Rodrigo Vivi wrote:
> > On Wed, Sep 25, 2024 at 05:45:25PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Since this switcheroo stuff bypasses all the core pm we
> > > hav
On Thu, Sep 26, 2024 at 06:38:56PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 26, 2024 at 10:45:44AM -0400, Rodrigo Vivi wrote:
> > On Wed, Sep 25, 2024 at 05:45:23PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Stop spelling out each variant of the hook ("" vs. "_late" vs.
>
On Thu, Sep 26, 2024 at 10:45:44AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 25, 2024 at 05:45:23PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Stop spelling out each variant of the hook ("" vs. "_late" vs.
> > "_early") and just say eg. "@thaw*" to indicate all of them.
> > Avoids
On Thu, Sep 26, 2024 at 10:48:41AM -0400, Rodrigo Vivi wrote:
> On Wed, Sep 25, 2024 at 05:45:25PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Since this switcheroo stuff bypasses all the core pm we
> > have to manually manage the pci state. To that end add the
> > missing pci_res
On Tue, Sep 24, 2024 at 04:37:04PM +0300, Jani Nikula wrote:
> On Tue, 24 Sep 2024, Lucas De Marchi wrote:
> > On Tue, Sep 24, 2024 at 12:49:25PM GMT, Jani Nikula wrote:
> >>On Thu, 29 Aug 2024, Ville Syrjälä wrote:
> >>> On Wed, Aug 28, 2024 at 04:41:24PM -0400, Rodrigo Vivi wrote:
> On Mon
On Wed, Sep 25, 2024 at 05:45:25PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Since this switcheroo stuff bypasses all the core pm we
> have to manually manage the pci state. To that end add the
> missing pci_restore_state() to the switcheroo resume hook.
> We already have the pci_save
On Wed, Sep 25, 2024 at 05:45:23PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Stop spelling out each variant of the hook ("" vs. "_late" vs.
> "_early") and just say eg. "@thaw*" to indicate all of them.
> Avoids having to update the docs whenever we start/stop using
> one of the varia
On Wed, Sep 25, 2024 at 05:45:22PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> driver/pci does the pci_save_state()+pci_set_power_state() from the
> _noirq() pm hooks. Move our manual calls (needed for the hibernate+D3
> workaround with buggy BIOSes) towards that same point. We currentl
On Wed, Sep 25, 2024 at 03:09:23PM -0700, Vinay Belgaumkar wrote:
> Some recent WAs reduce the GT freq during driver load/reset. Use sync
> reset so that we give enough time for GT frequency to be restored after
> reset has completed.
>
> Also, stash/restore frequencies per GT as they can be diffe
Bigjoiner needs DSC, but DSC might be disabled on some platforms.
The platform check itself is not sufficient, so add a check for
DSC to reflect that.
v2: Modify the commit message to address the DSC fuse case.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/d
At the moment, the debugfs for joiner allows only to force enable/disable
pipe joiner for 2 pipes. Modify it to force join 'n' number of pipes,
where n is a valid pipe joiner configuration.
This will help in case of ultra joiner where 4 pipes are joined.
v2:
-Fix commit message to state that only
Add a helper to compute the number of pipes required.
This will depend on whether the joiner is required or is forced through
the debugfs. If no joiner is required the helper returns 1.
v2:
-Return 1 if no joiner is required. (Ville)
-Change the suffix from joined_pipes to num_pipes. (Ville)
-Use
Currently we support joiner only for DP encoder.
Do not create the debugfs for joiner if DP does not support the joiner.
This will also help avoiding cases where config has eDP MSO, with which
we do not support joiner.
v2: Check for intel_dp_has_joiner and avoid creating debugfs if not
supported.
This patch series introduces enhancements to debugfs for forcing pipe
joiner and prepares for the implementation of the ultrajoiner.
These patches are derived from the original series [1] focused on the
basic functionality of the ultra joiner. The debugfs enhancements are
intended for merging prior
On 24/09/2024 10:12, Thomas Zimmermann wrote:
Call drm_client_setup_with_color_mode() to run the kernel's default
client setup for DRM. Set fbdev_probe in struct drm_driver, so that
the client setup can start the common fbdev client.
v5:
- select DRM_CLIENT_SELECTION
v3:
- add DRM_FBDEV_DMA_DRIV
On Thu, Sep 26, 2024 at 06:45:14PM +0530, Nautiyal, Ankit K wrote:
>
> On 9/26/2024 4:49 PM, Ville Syrjälä wrote:
> > On Thu, Sep 26, 2024 at 12:56:31PM +0530, Ankit Nautiyal wrote:
> >> Pass the current pipe into enabled_joiner_pipes(), and let it figure out
> >> the proper bitmasks for us. Since
On 24/09/2024 10:12, Thomas Zimmermann wrote:
Call drm_client_setup_with_fourcc() to run the kernel's default client
setup for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
v5:
- select DRM_CLIENT_SELECTION
v2:
- use drm_client_setup_with_
On Thu, Sep 26, 2024 at 06:37:46PM +0530, Nautiyal, Ankit K wrote:
>
> On 9/26/2024 4:44 PM, Ville Syrjälä wrote:
> > On Thu, Sep 26, 2024 at 12:56:25PM +0530, Ankit Nautiyal wrote:
> >> Currently we support joiner only for DP encoder.
> >> Do not create the debugfs for joiner if DP does not suppo
On 9/26/2024 4:49 PM, Ville Syrjälä wrote:
On Thu, Sep 26, 2024 at 12:56:31PM +0530, Ankit Nautiyal wrote:
Pass the current pipe into enabled_joiner_pipes(), and let it figure out
the proper bitmasks for us. Since the enabled_joiner_pipes now gets the
primary and secondary pipe wrt a given pip
On 9/26/2024 4:44 PM, Ville Syrjälä wrote:
On Thu, Sep 26, 2024 at 12:56:25PM +0530, Ankit Nautiyal wrote:
Currently we support joiner only for DP encoder.
Do not create the debugfs for joiner if DP does not support the joiner.
This will also help avoiding cases where config has eDP MSO, with
On 24/09/2024 10:13, Thomas Zimmermann wrote:
Rework fbdev probing to support fbdev_probe in struct drm_driver
and remove the old fb_probe callback. Provide an initializer macro
for struct drm_driver that sets the callback according to the kernel
configuration.
Call drm_client_setup() to run the
Hi,
On 24/09/2024 10:13, Thomas Zimmermann wrote:
Store instances of drm_fb_helper and struct omap_fbdev separately.
This will allow omapdrm to use the common fbdev client, which allocates
its own instance of struct drm_fb_helper.
There is at most one instance of each per DRM device, so both ca
== Series Details ==
Series: drm/i915/cx0: Set power state to ready only on owned PHY lanes (rev3)
URL : https://patchwork.freedesktop.org/series/138985/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15446 -> Patchwork_138985v3
=
== Series Details ==
Series: drm/i915/dp: Add FEC Enable Retry mechanism
URL : https://patchwork.freedesktop.org/series/138963/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15446 -> Patchwork_138963v1
Summary
---
**
On 24/09/2024 10:12, Thomas Zimmermann wrote:
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
The tidss driver specifies a preferred color mode of 32. As this
is the defaul
Hi Dave, Sima,
this is the PR for drm-misc-fixes for this week. Mostly the usual small
changes. That fix in the atomic-modesetting code touches UAPI code, but
does not change the UAPI itself.
Best regards
Thomas
drm-misc-fixes-2024-09-26:
Short summary of fixes pull:
atomic:
- Use correct type
On Wed, Sep 25, 2024 at 07:25:34PM -0500, Benjamin Hoefs wrote:
> Hello,
>
> I am using a Dell WD19TB dock with a 3440x1440 monitor. Using it at
> 100Hz used to work but recently I tried it again and discovered it no longer
> did, specifically the modeset seems to silently fail with no error messa
On Thu, Sep 26, 2024 at 12:56:25PM +0530, Ankit Nautiyal wrote:
> Currently we support joiner only for DP encoder.
> Do not create the debugfs for joiner if DP does not support the joiner.
> This will also help avoiding cases where config has eDP MSO, with which
> we do not support joiner.
>
> v2:
On Thu, Sep 26, 2024 at 12:56:35PM +0530, Ankit Nautiyal wrote:
> From: Stanislav Lisovskiy
>
> When bigjoiner is used, we need at least 2 dsc slices per pipe.
> Modify the condition in intel_dp_dsc_get_slice_count() to reflect the
> same.
>
> Signed-off-by: Stanislav Lisovskiy
> Signed-off-by:
On Thu, Sep 26, 2024 at 12:56:32PM +0530, Ankit Nautiyal wrote:
> From: Stanislav Lisovskiy
>
> Ultrajoiner mode has some new bits and states to be
> read out from the hw. Lets make changes accordingly.
>
> v2: Fix checkpatch warnings. (Ankit)
> v3: Add separate functions for computing expected
On Thu, Sep 26, 2024 at 12:56:31PM +0530, Ankit Nautiyal wrote:
> Pass the current pipe into enabled_joiner_pipes(), and let it figure out
> the proper bitmasks for us. Since the enabled_joiner_pipes now gets the
> primary and secondary pipe wrt a given pipe, the helpers
> to get primary pipe and s
On Wed, 25 Sep 2024, Arun R Murthy wrote:
> Add the register/bit definitions for global histogram.
>
> Signed-off-by: Arun R Murthy
> ---
> .../drm/i915/display/intel_histogram_reg.h| 54 +++
We have 36 files named *_regs.h under display/, and 0 files named
*_reg.h. We should
> -Original Message-
> From: Pottumuttu, Sai Teja
> Sent: Thursday, September 19, 2024 2:39 PM
> To: Anirban, Sk ; intel-gfx@lists.freedesktop.org;
> Gupta,
> Anshuman
> Cc: Poosa, Karthik ; Pottumuttu, Sai Teja
>
> Subject: Re: [PATCH v3] drm/i915/selftests: Implement frequency check
On Wed, 13 Dec 2023, Ankit Nautiyal wrote:
> At the moment, while choosing the input bpc for DSC, we take into
> account the max_requested_bpc property. This creates a problem, if the
> max_requested_bpc is lower than the minimum bpc required by source with
> DSC.
>
> So consider max_requested_bpc
> -Original Message-
> From: Intel-gfx On Behalf Of Ankit
> Nautiyal
> Sent: Wednesday, December 13, 2023 2:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: [PATCH 3/5] drm/i915/dp: Return int from
> dsc_max/min_src_input_bpc helpers
>
> Use ints for dsc_max/m
Hi Maxime,
On 26/09/24 12:56, Maxime Ripard wrote:
On Thu, Sep 26, 2024 at 12:36:49PM GMT, Vignesh Raman wrote:
Update the documentation to require linking to a relevant GitLab
issue for each new flake entry instead of an email report. Added
specific GitLab issue URLs for i915, xe and other dri
> -Original Message-
> From: Intel-gfx On Behalf Of Ankit
> Nautiyal
> Sent: Wednesday, December 13, 2023 2:46 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: [PATCH 1/5] drm/i915/dp: Simplify checks for helper
> intel_dp_dsc_max_src_input_bpc
>
> In helper inte
On Thu, 26 Sep 2024, Suraj Kandpal wrote:
> DSC does not support bpc under 8 according to DSC 1.2a Section 2
> Requirements. Return an error if that happens to be the case.
>
> --v2
> -should be bits_per_component [Mitul/Chaitanya/Srikanth]
> -Add reference to this restriction [Chaitanya]
>
> Sign
DSC does not support bpc under 8 according to DSC 1.2a Section 2
Requirements. Return an error if that happens to be the case.
--v2
-should be bit_per_component [Mitul/Chaitanya]
-Add reference to this restriction [Chaitanya]
--v3
-Add the bpc in which we see this warning [Jani]
Signed-off-by: S
On Thu, 26 Sep 2024, Jani Nikula wrote:
> On Wed, 18 Sep 2024, Ville Syrjala wrote:
>> +/*
>> + * Use DP_LINK_RATE_SET if DP_SUPPORTED_LINK_RATES are available,
>> + * default to DP_MAX_LINK_RATE and DP_LINK_BW_SET otherwise.
>> + */
>> +if (intel_dp->num_sink_rates)
>> +
On Wed, 18 Sep 2024, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Declutter intel_edp_init_dpcd() a bit by extracting the sink
> rates probing into its own function.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 76 +
> 1 file chang
Hi Dave & Sima,
Here goes final drm-intel-next-fixes towards v6.12.
Just one fix for DP colorimetry detection.
Regards, Joonas
***
drm-intel-next-fixes-2024-09-26:
- Fix colorimetry detection for DP
The following changes since commit d7126c0cfc137a580eba92bd82b6d288bd43961d:
Merge tag 'dr
On Thu, Sep 26, 2024 at 12:36:49PM GMT, Vignesh Raman wrote:
> Update the documentation to require linking to a relevant GitLab
> issue for each new flake entry instead of an email report. Added
> specific GitLab issue URLs for i915, xe and other drivers.
>
> Signed-off-by: Vignesh Raman
> ---
>
On Thu, Sep 26, 2024 at 12:36:49PM GMT, Vignesh Raman wrote:
> Update the documentation to require linking to a relevant GitLab
> issue for each new flake entry instead of an email report. Added
> specific GitLab issue URLs for i915, xe and other drivers.
>
> Signed-off-by: Vignesh Raman
> ---
>
Allow forcing ultrajoiner through debugfs.
v2: Minor refactoring of switch case logic. (Ville)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 8
1 file changed, 8 insertions(+)
diff --git
From: Stanislav Lisovskiy
Implement required changes for mode validation and compute config,
to support Ultrajoiner.
v2:
-Drop changes for HDMI.
-Separate out DSC changes into another patch.
v3: Fix check in can_ultrajoiner. (Ankit)
v4:
-Unify helper to check joiner requirement. (Ville)
-Split p
Add macro to check if platform supports Ultrajoiner.
v2:
-Use check for DISPLAY_VER >= 20, and add bmg as a special case. (Ville)
-Add check for HAS_DSC. (Ville)
Signed-off-by: Ankit Nautiyal
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_device.h | 3 +++
1 file cha
From: Stanislav Lisovskiy
When bigjoiner is used, we need at least 2 dsc slices per pipe.
Modify the condition in intel_dp_dsc_get_slice_count() to reflect the
same.
Signed-off-by: Stanislav Lisovskiy
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
1 fi
From: Stanislav Lisovskiy
Add changes to DSC which are required for Ultrajoiner.
v2:
-Use correct helper for setting bits for bigjoiner secondary. (Ankit)
-Use primary/secondary instead of master/slave. (Suraj)
v3: Add the ultrajoiner helpers and use it for setting ultrajoiner
bits (Ankit)
v4: U
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