Hi Yu,
On Wed, Aug 21, 2024 at 10:41:27AM +0800, Yu Jiaoliang wrote:
> Let the kememdup_array() take care about multiplication and possible
> overflows.
>
> v2:
> - Change subject
> - Leave one blank line between the commit log and the tag section
> - Fix code alignment issue
>
> v3:
> - Fix cod
Hi Rodrigo,
On Fri, Aug 23, 2024 at 09:41:31AM -0400, Rodrigo Vivi wrote:
> On Wed, Aug 21, 2024 at 09:32:48AM +0200, Andi Shyti wrote:
> > On Tue, Aug 20, 2024 at 05:22:40PM -0400, Rodrigo Vivi wrote:
> > > On Mon, Aug 19, 2024 at 01:31:40PM +0200, Andi Shyti wrote:
...
> > > > It might make sens
On Wed, Aug 21, 2024 at 02:59:08PM +0200, Thomas Zimmermann wrote:
> Call drm_client_setup_with_fourcc() to run the kernel's default client
> setup for DRM. Set fbdev_probe in struct drm_driver, so that the client
> setup can start the common fbdev client.
>
> v2:
> - use drm_client_setup_with_fou
On Fri, Aug 23, 2024 at 07:34:39PM +0200, Hans de Goede wrote:
> Hi,
>
> On 8/23/24 10:22 AM, Jani Nikula wrote:
> > On Fri, 23 Aug 2024, Hans de Goede wrote:
> >> There are 2G and 4G RAM versions of the Lenovo Yoga Tab 3 X90F and it
> >> turns out that the 2G version has a DMI product name of
>
On Fri, Aug 23, 2024 at 03:40:09PM +0530, Dnyaneshwar Bhadane wrote:
> Program HZ Plane disable bit to 1 to stop sending the redundant
> plane expansions.
>
> Bspec: 68331
>
> Signed-off-by: Dnyaneshwar Bhadane
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 5 +++--
> drivers/gpu/drm/i9
== Series Details ==
Series: drm: Use full allocated minor range for DRM (rev4)
URL : https://patchwork.freedesktop.org/series/108206/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm: Use full allocated minor range for DRM (rev4)
URL : https://patchwork.freedesktop.org/series/108206/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15286 -> Patchwork_108206v4
Summary
--
Hi,
On 8/23/24 10:22 AM, Jani Nikula wrote:
> On Fri, 23 Aug 2024, Hans de Goede wrote:
>> There are 2G and 4G RAM versions of the Lenovo Yoga Tab 3 X90F and it
>> turns out that the 2G version has a DMI product name of
>> "CHERRYVIEW D1 PLATFORM" where as the 4G version has
>> "CHERRYVIEW C0 PLA
== Series Details ==
Series: drm/i915/dp_mst: Fix MST state after a sink reset (rev3)
URL : https://patchwork.freedesktop.org/series/136443/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15285 -> Patchwork_136443v3
Summary
== Series Details ==
Series: drm/i915/dp_mst: Fix MST state after a sink reset (rev3)
URL : https://patchwork.freedesktop.org/series/136443/
State : warning
== Summary ==
Error: dim checkpatch failed
516be2fb8f69 drm/i915/dp_mst: Fix MST state after a sink reset
-:109: WARNING:MISSING_FIXES_TA
Having a limit of 64 DRM devices is not good enough for modern world
where we have multi-GPU servers, SR-IOV virtual functions and virtual
devices used for testing.
Let's utilize full minor range for DRM devices.
To avoid regressing the existing userspace, we're still maintaining the
numbering sche
Accel minor management is based on DRM (and is also using struct
drm_minor internally), since DRM is using XArray for minors, it makes
sense to also convert accel.
As the two implementations are identical (only difference being the
underlying xarray), move the accel_minor_* functionality to DRM.
A
IDR is deprecated, and since XArray manages its own state with internal
locking, it simplifies the locking on DRM side.
Additionally, don't use the IRQ-safe variant, since operating on drm
minor is not done in IRQ context.
Suggested-by: Matthew Wilcox
Acked-by: James Zhu
Signed-off-by: Michał Wi
64 DRM device nodes is not enough for everyone.
Upgrade it to ~512K (which definitely is more than enough).
Additionally, convert minors to use XArray instead of IDR to simplify
the locking.
Corresponding libdrm changes were merged in:
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/305
In some cases the sink can reset itself after it was configured into MST
mode, without the driver noticing the disconnected state. For instance
the reset may happen in the middle of a modeset, or the (long) HPD pulse
generated may be not long enough for the encoder detect handler to
observe the HPD
== Series Details ==
Series: CCS static load balance (rev2)
URL : https://patchwork.freedesktop.org/series/137715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15284 -> Patchwork_137715v2
Summary
---
**SUCCESS**
== Series Details ==
Series: CCS static load balance (rev2)
URL : https://patchwork.freedesktop.org/series/137715/
State : warning
== Summary ==
Error: dim checkpatch failed
6ad023c9bef4 drm/i915/gt: Avoid using masked workaround for CCS_MODE setting
bde55a5f33ad drm/i915/gt: Move the CCS mode
== Series Details ==
Series: CCS static load balance (rev2)
URL : https://patchwork.freedesktop.org/series/137715/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Jul 31, 2024 at 2:23 PM Thomas Zimmermann wrote:
> Replace FB_BLANK_ constants with their counterparts from the
> backlight subsystem. The values are identical, so there's no
> change in functionality or semantics.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Linus Walleij
> Cc: Neil Arms
== Series Details ==
Series: series starting with [1/2] drm/ttm: fix kernel-doc typo for
@trylock_only
URL : https://patchwork.freedesktop.org/series/137719/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15283 -> Patchwork_137719v1
== Series Details ==
Series: series starting with [1/2] drm/ttm: fix kernel-doc typo for
@trylock_only
URL : https://patchwork.freedesktop.org/series/137719/
State : warning
== Summary ==
Error: dim checkpatch failed
2db722b79996 drm/ttm: fix kernel-doc typo for @trylock_only
0809e2f82c9f drm
On Fri, Aug 23, 2024 at 03:33:18PM +0300, Jani Nikula wrote:
> There are a number of leftover #include "display/..." directives that
> are completely unnecessary. Remove them to make it easier to spot the
> relevant ones. In one case, switch to a more specific include.
>
> Signed-off-by: Jani Niku
== Series Details ==
Series: CCS static load balance
URL : https://patchwork.freedesktop.org/series/137715/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15283 -> Patchwork_137715v1
Summary
---
**FAILURE**
Serious
== Series Details ==
Series: CCS static load balance
URL : https://patchwork.freedesktop.org/series/137715/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: CCS static load balance
URL : https://patchwork.freedesktop.org/series/137715/
State : warning
== Summary ==
Error: dim checkpatch failed
f36edbebc969 drm/i915/gt: Avoid using masked workaround for CCS_MODE setting
9744b72c26af drm/i915/gt: Move the CCS mode variab
Am 23.08.24 um 16:11 schrieb Jani Nikula:
s/tryock_only/trylock_only/
Fixes: da966b82bf3d ("drm/ttm: Provide a generic LRU walker helper")
Cc: Thomas Hellström
Cc: Christian König
Signed-off-by: Jani Nikula
Reviewed-by: Christian König
---
include/drm/ttm/ttm_bo.h | 2 +-
1 file chang
Ensure drm headers build, are self-contained, have header guards, and
have no kernel-doc warnings, when CONFIG_DRM_HEADER_TEST=y.
The mechanism follows similar patters used in i915, xe, and usr/include.
To cover include/drm, we need to recurse there using the top level
Kbuild and the new include/
s/tryock_only/trylock_only/
Fixes: da966b82bf3d ("drm/ttm: Provide a generic LRU walker helper")
Cc: Thomas Hellström
Cc: Christian König
Signed-off-by: Jani Nikula
---
include/drm/ttm/ttm_bo.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/ttm/ttm_bo.h b/inclu
== Series Details ==
Series: Increase fastwake sync pulse count as a quirk (rev2)
URL : https://patchwork.freedesktop.org/series/137524/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15283 -> Patchwork_137524v2
Summary
== Series Details ==
Series: Increase fastwake sync pulse count as a quirk (rev2)
URL : https://patchwork.freedesktop.org/series/137524/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/as
On Wed, Aug 21, 2024 at 09:32:48AM +0200, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Tue, Aug 20, 2024 at 05:22:40PM -0400, Rodrigo Vivi wrote:
> > On Mon, Aug 19, 2024 at 01:31:40PM +0200, Andi Shyti wrote:
> > > The i915 driver generates sysfs entries for each engine of the
> > > GPU in /sys/class/d
On Fri, Aug 16, 2024 at 10:20:48AM +0200, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Thu, Aug 15, 2024 at 02:58:25PM -0400, Rodrigo Vivi wrote:
> > On Wed, Aug 14, 2024 at 07:59:47PM +0200, Andi Shyti wrote:
> > > The cast from "long" to "unsigned long" is unnecessary. Remove
> > > it.
> >
> > I don'
== Series Details ==
Series: drm/i915: remove unnecessary display includes
URL : https://patchwork.freedesktop.org/series/137706/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15283 -> Patchwork_137706v1
Summary
---
Create the 'ccs_mode' file under
/sys/class/drm/cardX/gt/gt0/ccs_mode
This file allows the user to read and set the current CCS mode.
- Reading: The user can read the current CCS mode, which can be
1, 2, or 4. This value is derived from the current engine
mask.
- Writing: The user can s
In preparation for upcoming patches, we need routines to
dynamically create and destroy CCS engines based on the CCS mode
that the user wants to set.
The process begins by calculating the engine mask for the engines
that need to be added or removed. We then update the UABI list of
exposed engines
In preparation for upcoming patches, we need the ability to
create and remove individual sysfs files. To facilitate this,
extract from the intel_engines_add_sysfs() function the creation
of individual files.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/sysfs_engines.c | 74 +
Until now, the UABI engines list has been accessed in read-only
mode, as it was created once during boot and destroyed upon
module unload.
In upcoming commits, we will be modifying this list by changing
the CCS mode, allowing compute engines to be dynamically added
and removed at runtime based on
To support upcoming patches, we need to store the current mask
for active CCS engines.
Active engines refer to those exposed to userspace via the UABI
engine list.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 41 +++--
drivers/gpu/drm/i915/gt/intel
Upcoming commits will need to access engine-related kobjects to
enable the creation and destruction of sysfs interfaces at
runtime.
For this, store the "engine" directory (i915->sysfs_engine), the
engine files (gt->kobj), and the default data
(gt->kobj_defaults).
Signed-off-by: Andi Shyti
---
d
Implement a sysfs interface to show the number of available CCS
slices. The displayed number does not take into account the CCS
balancing mode.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 21 +
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 1 +
Following the decision to manage CCS engine creation within UABI
engines, the "cslices" variable in the "ccs" structure in the
"gt" is no longer needed. Remove it is now redundant.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_
In commit ea315f98e5d6 ("drm/i915/gt: Do not generate the command
streamer for all the CCS"), we restricted the creation of
physical CCS engines to only one stream. This allowed the user to
submit a single compute workload, with all CCS slices sharing the
workload from that stream.
This patch remo
Selftests should run only on enabled engines, as disabled engines
are not intended for use. A practical example is when, on DG2
machines, the user chooses to utilize only one CCS stream instead
of all four.
To address this, introduce the for_each_enabled_engine() loop,
which will skip engines when
Mark engines as invalid when they are not added to the UABI list
to prevent accidental assignment of batch buffers.
Currently, this change is mostly precautionary with minimal
impact. However, in the future, when CCS engines will be
dynamically added and removed by the user, this mechanism will
be
For the upcoming changes we need a cleaner way to build the list
of uabi engines.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 29 -
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i9
Until now, we have only set CCS mode balancing to 1, which means
that only one compute engine is exposed to the user. The stream
of compute commands submitted to that engine is then shared among
all the dedicated execution units.
This is done by calling the 'intel_gt_apply_ccs_mode(); function.
W
Store the CCS mode value in the intel_gt->ccs structure to make
it available for future instances that may need to change its
value.
Name it mode_reg_val because it holds the value that will
be written into the CCS_MODE register, determining the CCS
balancing and, consequently, the number of engin
When setting the CCS mode, we mistakenly used wa_masked_en() to
apply the workaround, which reads from the register and masks the
existing value with the new one.
Our intention was to write the value directly, without masking
it.
So far, this hasn't caused issues because we've been using a
regist
Hi,
This patch series introduces static load balancing for GPUs with
multiple compute engines. It's a lengthy series, and some
challenging aspects still need to be resolved.
I have tried to split the work as much as possible to facilitate
the review process.
To summarize, in patches 1 to 14, no
On Thu, Aug 22, 2024 at 05:53:19PM +0300, Jani Nikula wrote:
> On Thu, 22 Aug 2024, Imre Deak wrote:
> > On Thu, Aug 22, 2024 at 01:00:03PM +0300, Jani Nikula wrote:
> >> On Wed, 21 Aug 2024, Imre Deak wrote:
> >> > On Wed, Aug 21, 2024 at 05:19:11PM +0300, Jani Nikula wrote:
> >> >> On Wed, 24 J
Hi,
This patch series introduces static load balancing for GPUs with
multiple compute engines. It's a lengthy series, and some
challenging aspects still need to be resolved.
I have tried to split the work as much as possible to facilitate
the review process.
To summarize, in patches 1 to 14, no
On Thu, Aug 22, 2024 at 12:38:28PM +0300, Kandpal, Suraj wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of Imre
> > Deak
> > Sent: Wednesday, July 24, 2024 10:10 PM
> > To: Jani Nikula
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH] drm/i915/dp_mst: Fix
Currently there is no way to apply quirk on device only if certain panel
model is installed. This patch implements such mechanism by adding new
quirk type intel_dpcd_quirk which contains also sink_oui and sink_device_id
fields and using also them to figure out if applying quirk is needed.
New inte
In commit "drm/i915/display: Increase number of fast wake precharge pulses"
we were increasing Fast Wake sync pulse length to fix problems observed on
Dell Precision 5490 laptop with AUO panel. Later we have observed this is
causing problems on other panels.
Fix these problems by increasing Fast W
Implement mechanism to apply quirk only if certain panel is detected
on certain setup. Use this new mechanism to increase fastwake sync
pulse count on certain Dell laptop and only if specific panel is
installed on that laptop.
Jouni Högander (2):
drm/i915/display: Add mechanism to use sink mode
On Wed, Aug 21, 2024 at 03:05:05PM +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Wednesday, July 3, 2024 5:50 PM
> > To: Manna, Animesh
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH 10/14] drm/i915/dsb: Introduce intel_dsb_ch
On Wed, Aug 21, 2024 at 02:58:20PM +, Manna, Animesh wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Friday, July 5, 2024 11:09 PM
> > To: Manna, Animesh
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH 11/14] drm/i915/dsb: Allow intel_dsb_chain()
There are a number of leftover #include "display/..." directives that
are completely unnecessary. Remove them to make it easier to spot the
relevant ones. In one case, switch to a more specific include.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 --
drivers
== Series Details ==
Series: drm/i915/gt: Disable Redundant HZ Plane expansions for MTL/ARL and DG2
URL : https://patchwork.freedesktop.org/series/137701/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15283 -> Patchwork_137701v1
On Thu, 22 Aug 2024, Rodrigo Vivi wrote:
> On Thu, Aug 22, 2024 at 07:04:55PM +0300, Jani Nikula wrote:
>> Going forward, struct intel_display shall replace struct
>> drm_i915_private as the main display device data pointer type. Convert
>> intel_display_params.[ch] and intel_display_debugfs_param
Program HZ Plane disable bit to 1 to stop sending the redundant
plane expansions.
Bspec: 68331
Signed-off-by: Dnyaneshwar Bhadane
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 5 +++--
drivers/gpu/drm/i915/gt/intel_workarounds.c | 17 +++--
2 files changed, 18 insertions(+), 4
On Thu, 22 Aug 2024, Rodrigo Vivi wrote:
> On Thu, Aug 22, 2024 at 07:04:51PM +0300, Jani Nikula wrote:
>> Going forward, struct intel_display shall replace struct
>> drm_i915_private as the main display device data pointer type. Convert
>> intel_vblank.[ch] to struct intel_display.
>>
>> Some st
On Fri, 2024-08-23 at 09:49 +, Kandpal, Suraj wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Friday, August 23, 2024 12:51 PM
> > To: Kandpal, Suraj ; intel-
> > g...@lists.freedesktop.org
> > Cc: Murthy, Arun R ; Manna, Animesh
> > ; jani.nik...@linux.intel.co
Hi Dave & Sima,
Mostly fixes in this drm-intel-gt-next PR at this time.
One thing to pay attention is the limitation of number of relocations to
INT_MAX which might impact synthetic tests, but no real workloads.
Regards, Joonas
***
drm-intel-gt-next-2024-08-23:
UAPI Changes:
- drm/i915: 2 Gi
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, August 23, 2024 12:51 PM
> To: Kandpal, Suraj ; intel-
> g...@lists.freedesktop.org
> Cc: Murthy, Arun R ; Manna, Animesh
> ; jani.nik...@linux.intel.com
> Subject: Re: [PATCH 2/2] drm/i915/psr: Implment WA to help reach PC10
>
== Series Details ==
Series: drm/i915: remove unused leftover basedie step code (rev2)
URL : https://patchwork.freedesktop.org/series/137650/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15282 -> Patchwork_137650v2
Summary
== Series Details ==
Series: drm/i915: remove unused leftover basedie step code (rev2)
URL : https://patchwork.freedesktop.org/series/137650/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dsi: Make Lenovo Yoga Tab 3 X90F DMI match less strict
URL : https://patchwork.freedesktop.org/series/137693/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15282 -> Patchwork_137693v1
S
On Fri, 23 Aug 2024, Yuesong Li wrote:
> cocci report a double assignment warning. 'as_sdp->duration_incr_ms'
> was assigned twice in intel_dp_compute_as_sdp().
>
> Signed-off-by: Yuesong Li
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 1 -
> 1 file changed, 1 de
On Fri, 23 Aug 2024, Hans de Goede wrote:
> There are 2G and 4G RAM versions of the Lenovo Yoga Tab 3 X90F and it
> turns out that the 2G version has a DMI product name of
> "CHERRYVIEW D1 PLATFORM" where as the 4G version has
> "CHERRYVIEW C0 PLATFORM". The sys-vendor + product-version check are
There are 2G and 4G RAM versions of the Lenovo Yoga Tab 3 X90F and it
turns out that the 2G version has a DMI product name of
"CHERRYVIEW D1 PLATFORM" where as the 4G version has
"CHERRYVIEW C0 PLATFORM". The sys-vendor + product-version check are
unique enough that the product-name check is not ne
On Fri, 2024-08-23 at 06:18 +, Kandpal, Suraj wrote:
>
>
> > -Original Message-
> > From: Hogander, Jouni
> > Sent: Friday, August 23, 2024 10:54 AM
> > To: Kandpal, Suraj ;
> > intel-gfx@lists.freedesktop.org
> > Cc: Murthy, Arun R ; Manna, Animesh
> > ; jani.nik...@linux.intel.com
== Series Details ==
Series: drm/i915: Implement Dbuf overlap detection feature starting from LNL
(rev3)
URL : https://patchwork.freedesktop.org/series/136884/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15282 -> Patchwork_136884v3
==
== Series Details ==
Series: drm/i915: Implement Dbuf overlap detection feature starting from LNL
(rev3)
URL : https://patchwork.freedesktop.org/series/136884/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately
== Series Details ==
Series: drm/i915: Implement Dbuf overlap detection feature starting from LNL
(rev3)
URL : https://patchwork.freedesktop.org/series/136884/
State : warning
== Summary ==
Error: dim checkpatch failed
a0ab13e3121f drm/i915: Implement Dbuf overlap detection feature starting f
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