.clock is not necessarily required to have in pll state
structure as it can always recalculated with the *_calc_port_clock()
function. Hence, let's remove this struct member complitely.
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 86 ---
drivers
As a preparation to remove .clock member from pll state
structure, let's move the port clock calculation on better
location
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 176 ++-
1 file changed, 91 insertions(+), 85 deletions(-)
diff --git a/drive
Hi,
https://patchwork.freedesktop.org/series/132786/ - Re-reported.
Thanks,
Tejasree
-Original Message-
From: Intel-gfx On Behalf Of Janusz
Krzysztofik
Sent: Monday, May 13, 2024 2:48 PM
To: i915-ci-in...@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org; Andi Shyti
Subject: R
== Series Details ==
Series: drm/i915/dp_mst: Enable link training fallback (rev2)
URL : https://patchwork.freedesktop.org/series/133624/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14761 -> Patchwork_133624v2
Summary
---
== Series Details ==
Series: drm/i915/dp_mst: Enable link training fallback (rev2)
URL : https://patchwork.freedesktop.org/series/133624/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/a
== Series Details ==
Series: drm/i915/dp_mst: Enable link training fallback (rev2)
URL : https://patchwork.freedesktop.org/series/133624/
State : warning
== Summary ==
Error: dim checkpatch failed
3a1b500eaeee drm/i915/dp_mst: Align TUs to avoid splitting symbols across MTPs
8a2e9d5cdccc drm/i
Recheck the link state after a passing link training, with a 2 sec delay
to account for cases where the link goes bad following the link training
and the sink doesn't report this via an HPD IRQ.
The delayed work added here will be also used by a later patch after a
failed link training to try to r
== Series Details ==
Series: drm/i915/dp_mst: Enable link training fallback
URL : https://patchwork.freedesktop.org/series/133624/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14761 -> Patchwork_133624v1
Summary
---
== Series Details ==
Series: drm/i915/dp_mst: Enable link training fallback
URL : https://patchwork.freedesktop.org/series/133624/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bito
== Series Details ==
Series: drm/i915/dp_mst: Enable link training fallback
URL : https://patchwork.freedesktop.org/series/133624/
State : warning
== Summary ==
Error: dim checkpatch failed
8b753f20ffcb drm/i915/dp_mst: Align TUs to avoid splitting symbols across MTPs
df53d2f9ed23 drm/i915/dp:
Add connector debugfs entries to set a target link rate/lane count to be
used by a link training afterwards. After setting a target link
rate/lane count reset the link training parameters and for a non-auto
target disable reducing the link parameters via the fallback logic. The
former one can be u
Add counters for link training pass/failure events and a connector
debugfs entry showing these and relevant link training information. This
is meant to be used by automated testing of the driver's link retraining
and link parameter fallback functionality.
Signed-off-by: Imre Deak
---
.../drm/i91
Add a connector debugfs entry to force retrain an active link. This can
be used to test both custom link parameters (previously set via the
target link lane count/rate entries) or link train failure scenarios
(previously forced via the force-failure entry). The entry will
autoreset after the link-r
Add a connector debugfs entry to force a failure during the following
1-2 link training. The entry will auto-reset after the specified link
training events are complete.
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_display_debugfs.c | 47 +++
.../drm/i915/display/inte
Reduce the link parameters after a link training failure for MST
outputs, similarly to how this is done for SST.
For now allow the reduction only by staying in the 8b/10b vs. 128b/132b
mode. Enabling the mode switch is left for a follow-up patchset, after
taking measures ensuring that the mode swi
Recheck the link state after a passing link training, with a 2 sec delay
to account for cases where the link goes bad following the link training
and the sink doesn't report this via an HPD IRQ.
The delayed work added here will be also used by a later patch after a
failed link training to try to r
After a link training failure if the link parameters can't be further
reduced, there is no point in trying to retrain the link in the driver.
This avoids excessive retrain attempts after detecting a bad link, for
instance while handling MST HPD IRQs, which is likely redundant as the
link training f
Try to maintain the current link parameters by retrying the link
training with unchanged link parameters before reducing these parameters
(sending an uevent to userspace to retrain the link instead).
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display_types.h| 2 ++
drive
Reset the flag indicating an active link after disabling an MST link,
similarly to how this is done for SST outputs. This avoids trying to
retrain an MST link while its disabled.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +++
1 file changed, 3 insertions(+)
di
Send a modeset-retry uevent to all connectors in the same MST topology
after a link training failure and reduction of the link parameters. This
matches the way the same uevent is sent after a DP tunnel BW allocation
failure.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c
Simplify things by retraining a DP link if a bad link is detected in the
connector detect handler from the encoder's check link state work,
similarly to how this is done after a modeset link training failure.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 ---
Simplify things by retraining a DP link if a bad link is detected in the
hotplug handler from the encoder's check link state work, similarly to
how this is done after a modeset link training failure.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/g4x_dp.c| 20 +---
When notifying userspace to retry a modeset, the notified connectors are
not really specific to those contained in the atomic state. For MST,
where this makes a difference, all enabled connectors in the same MST
topology should be notified which is guaranteed by the commit adding all
these connecto
Simplify things by retraining a DP link if a bad link is detected in the
HPD IRQ handler from the encoder's check link state work, similarly to
how this is done after a modeset link training failure.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 9 +
1 file chang
Instead of direct calls to the link train functions, retrain the link
via a commit modeset. The direct call means that the output port will be
disabled/re-enabled while the rest of the pipeline (transcoder) is
active, which doesn't seem to work on MST at least. It leads to
underruns and black scree
For clarity move the link training parameters updated during link
training based on the pass/fail LT result under a substruct in intel_dp.
This prepares for later patches in this patchset adding similar params
here. Rename intel_dp_reset_max_link_params() to
intel_dp_reset_link_train_params() to be
Reduce the indentation in intel_dp_get_link_train_fallback_values() by
adding separate helpers to reduce the link rate and lane count. Also
simplify things by passing crtc_state to the function.
This also prepares for later patches in the patchset adding a limitation
on how the link params are red
Factor out a function to modeset commit a set of pipes, which a later
patch will reuse for DP link retraining.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_ddi.c | 31 +-
drivers/gpu/drm/i915/display/intel_display.c | 34
drivers/gpu/dr
Move the functions used to reduce the link parameters during link
training to intel_dp_link_training.c .
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 76 +--
drivers/gpu/drm/i915/display/intel_dp.h | 4 +-
.../drm/i915/display/intel_dp_link_
Symbols consisting of multiple (4) TU timeslots may get split across
MTPs when using 2 or 1 link lanes. Avoid this, as required by Bspec by
aligning the allocated TUs to 2 when using 2 lanes and 4 when using 1
lane.
Atm, we also have to align the PBNs used to allocate BW along the MST
path, since
This patchset enables the link training fallback logic for MST links,
similarly to how this is done for SST links. It also fixes the MST
link-retraining - which requires a full modeset as opposed to SST - and
adds a way for automated testing of the link training fallback and
retraining functionalit
On Tue, 2024-05-14 at 12:25 +0300, Joonas Lahtinen wrote:
> Quoting Kenneth Graunke (2024-05-11 03:58:34)
> > On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> > > On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila
> > > wrote:
> > > > These patches introduce I915_FORMAT_MOD_4_T
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Shadow default engine context
image in the context
URL : https://patchwork.freedesktop.org/series/133616/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14760 -> Patchwork_133616v1
===
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Shadow default engine context
image in the context
URL : https://patchwork.freedesktop.org/series/133616/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be che
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Shadow default engine context
image in the context
URL : https://patchwork.freedesktop.org/series/133616/
State : warning
== Summary ==
Error: dim checkpatch failed
2d1ba3494c3f drm/i915: Shadow default engine context image
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 723adadf19b6bd8a54881b0e7d04ba56c4e8f401
commit: 723adadf19b6bd8a54881b0e7d04ba56c4e8f401 [10/10] drm-tip:
2024y-05m-14d-12h-21m-31s UTC integration manifest
reproduce:
(https://download.01.org/0day-ci/archive/20240514
From: Tvrtko Ursulin
When debugging GPU hangs Mesa developers are finding it useful to replay
the captured error state against the simulator. But due various simulator
limitations which prevent replicating all hangs, one step further is being
able to replay against a real GPU.
This is almost doa
From: Tvrtko Ursulin
To enable adding override of the default engine context image let us start
shadowing the per engine state in the context.
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
Cc: Carlos Santa
Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
Signed-off-by: Tvrtko Ursulin
---
== Series Details ==
Series: drm/i915: Fix memory leak by correcting cache object name in error
handler (rev2)
URL : https://patchwork.freedesktop.org/series/133610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14760 -> Patchwork_133610v2
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Shadow default engine context
image in the context
URL : https://patchwork.freedesktop.org/series/133609/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsub
== Series Details ==
Series: drm/i915/panelreplay: Panel replay workaround with VRR (rev5)
URL : https://patchwork.freedesktop.org/series/129632/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14760 -> Patchwork_129632v5
Sum
From: Tvrtko Ursulin
To enable adding override of the default engine context image let us start
shadowing the per engine state in the context.
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
Cc: Carlos Santa
Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
Signed-off-by: Tvrtko Ursulin
---
Replace "slab_priorities" with "slab_dependencies" in the error handler
to avoid memory leak.
Fixes: 32eb6bcfdda9 ("drm/i915: Make request allocation caches global")
Signed-off-by: Jiasheng Jiang
---
Changelog:
v1 -> v2:
1. Alter the subject.
---
drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
1
From: Tvrtko Ursulin
When debugging GPU hangs Mesa developers are finding it useful to replay
the captured error state against the simulator. But due various simulator
limitations which prevent replicating all hangs, one step further is being
able to replay against a real GPU.
This is almost doa
> On 5/11/2024 5:48 PM, Jiasheng Jiang wrote:
>> Replace "slab_priorities" with "slab_dependencies" in the error handler to
>> avoid memory leak.
>
> Nice catch. I would make the subject more like:
>
> drm/i915: Fix memory leak by correcting cache object name in error handler
>
>>
>> Fixes: 32e
Replace "slab_priorities" with "slab_dependencies" in the error handler
to avoid memory leak.
Fixes: 32eb6bcfdda9 ("drm/i915: Make request allocation caches global")
Cc: # v5.2+
Reviewed-by: Nirmoy Das
Signed-off-by: Jiasheng Jiang
---
Changelog:
v1 -> v2:
1. Alter the subject.
---
drivers/g
> On 5/11/2024 5:48 PM, Jiasheng Jiang wrote:
>> Replace "slab_priorities" with "slab_dependencies" in the error handler to
>> avoid memory leak.
>
> Nice catch. I would make the subject more like:
>
> drm/i915: Fix memory leak by correcting cache object name in error handler
>
>>
>> Fixes: 32e
Panel Replay VSC SDP not getting sent when VRR is enabled
and W1 and W2 are 0. So Program Set Context Latency in
TRANS_SET_CONTEXT_LATENCY register to at least a value of 1.
HSD: 14015406119
v1: Initial version.
v2: Update timings stored in adjusted_mode struct. [Ville]
v3: Add WA in compute_conf
Please ignore this patch. (Wrong branch)
On 5/13/2024 9:29 PM, Chen, Angus wrote:
From: Angus Chen
Applying it to VDBOX after recent performance data on MTL
Signed-off-by: Angus Chen
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/dri
Hi Janusz,
On Tue, Apr 23, 2024 at 06:23:10PM +0200, Janusz Krzysztofik wrote:
> From: Chris Wilson
>
> The breadcrumbs use a GT wakeref for guarding the interrupt, but are
> disarmed during release of the engine wakeref. This leaves a hole where
> we may attach a breadcrumb just as the engine i
== Series Details ==
Series: drm/i915: Use for_each_child instead of manual for-loop
URL : https://patchwork.freedesktop.org/series/133600/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14759 -> Patchwork_133600v1
Summary
-
== Series Details ==
Series: drm/i915: Use for_each_child instead of manual for-loop
URL : https://patchwork.freedesktop.org/series/133600/
State : warning
== Summary ==
Error: dim checkpatch failed
a819a4616d1b drm/i915: Use for_each_child instead of manual for-loop
-:45: WARNING:AVOID_BUG: D
== Series Details ==
Series: Documentation/i915: remove kernel-doc for DMC wakelocks
URL : https://patchwork.freedesktop.org/series/133435/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14746_full -> Patchwork_133435v1_full
Simplify child iteration using for_each_child macro
instead of using manual for loop. There is no functional
change.
Cc: John Harrison
Cc: Tvrtko Ursulin
Signed-off-by: Nirmoy Das
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 64 ++-
1 file changed, 33 insertions(+), 31 d
Quoting Kenneth Graunke (2024-05-11 03:58:34)
> On Tuesday, May 7, 2024 3:56:57 PM PDT Matt Roper wrote:
> > On Mon, May 06, 2024 at 09:52:35PM +0300, Juha-Pekka Heikkila wrote:
> > > These patches introduce I915_FORMAT_MOD_4_TILED_XE2_CCS modifier, which,
> > > from the kernel's perspective, behav
On Tue, 14 May 2024, Thomas Zimmermann wrote:
> Am 13.05.24 um 22:27 schrieb Jani Nikula:
>> All users of drm_do_get_edid() have been converted to
>> drm_edid_read_custom(). Remove the unused function to prevent new users
>> from creeping in.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Thom
Am 13.05.24 um 22:27 schrieb Jani Nikula:
All users of drm_do_get_edid() have been converted to
drm_edid_read_custom(). Remove the unused function to prevent new users
from creeping in.
Signed-off-by: Jani Nikula
Reviewed-by: Thomas Zimmermann
---
Cc: Robert Foss
Cc: Maarten Lankhors
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