== Series Details ==
Series: drm/i915/psr: Only allow PSR in LPSP mode on HSW non-ULT (rev2)
URL : https://patchwork.freedesktop.org/series/128957/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14143 -> Patchwork_128957v2
S
== Series Details ==
Series: drm/i915/mtl: Wake GT before sending H2G message
URL : https://patchwork.freedesktop.org/series/128961/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14142 -> Patchwork_128961v1
Summary
---
On Thu, Jan 18, 2024 at 05:21:23PM -0800, Belgaumkar, Vinay wrote:
>
> On 1/18/2024 3:50 PM, Matt Roper wrote:
> > On Thu, Jan 18, 2024 at 03:17:28PM -0800, Vinay Belgaumkar wrote:
> > > Instead of waiting until the interrupt reaches GuC, we can grab a
> > > forcewake while triggering the H2G inte
On 1/18/2024 3:50 PM, Matt Roper wrote:
On Thu, Jan 18, 2024 at 03:17:28PM -0800, Vinay Belgaumkar wrote:
Instead of waiting until the interrupt reaches GuC, we can grab a
forcewake while triggering the H2G interrupt. GEN11_GUC_HOST_INTERRUPT
is inside an "always on" domain with respect to RC6
On Thu, Jan 18, 2024 at 03:17:28PM -0800, Vinay Belgaumkar wrote:
> Instead of waiting until the interrupt reaches GuC, we can grab a
> forcewake while triggering the H2G interrupt. GEN11_GUC_HOST_INTERRUPT
> is inside an "always on" domain with respect to RC6. However, there
A bit of a nitpick, b
On Mon, Jan 08, 2024 at 03:37:29PM -, Patchwork wrote:
> == Series Details ==
>
> Series: Extend ARL support
> URL : https://patchwork.freedesktop.org/series/128322/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_14092_full -> Patchwork_128322v1_full
> ===
On Thu, Jan 18, 2024 at 01:48:43PM -0800, Yury Norov wrote:
On Thu, Jan 18, 2024 at 02:42:12PM -0600, Lucas De Marchi wrote:
Hi,
Reviving this thread as now with xe driver merged we have 2 users for
a fixed-width BIT/GENMASK.
Can you point where and why?
See users of REG_GENMASK and REG_BIT
On Mon, Jan 08, 2024 at 05:57:38PM +0530, Haridhar Kalvala wrote:
> From: Matt Roper
>
> Some of our existing Xe_LPG workarounds and tuning are also applicable
> to the version 12.74 variant. Extend the condition bounds accordingly.
> Also fix the comment on Wa_14018575942 while we're at it.
>
== Series Details ==
Series: drm/i915/psr: Only allow PSR in LPSP mode on HSW non-ULT
URL : https://patchwork.freedesktop.org/series/128957/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_128957v1
Summary
Instead of waiting until the interrupt reaches GuC, we can grab a
forcewake while triggering the H2G interrupt. GEN11_GUC_HOST_INTERRUPT
is inside an "always on" domain with respect to RC6. However, there
could be some delays when platform is entering/exiting some higher
level platform sleep states
On Wed, Jan 17, 2024 at 06:46:24PM +0100, Nirmoy Das wrote:
>
> On 1/17/2024 3:13 PM, Michał Winiarski wrote:
> > On Tue, Jan 16, 2024 at 09:56:25AM +0200, Ville Syrjala wrote:
> >> From: Ville Syrjälä
> >>
> >> Now that the GGTT PTE updates go straight to GSMBASE (bypassing
> >> GTTMMADR) there
On Mon, Jan 08, 2024 at 05:57:36PM +0530, Haridhar Kalvala wrote:
> From: Matt Roper
>
> Our existing MTL driver handling is also sufficient to handle ARL, so
> these IDs are simply added to the MTL ID list.
>
> Bspec: 55420
> Signed-off-by: Matt Roper
Reviewed-by: Matt Atwood
> ---
> include
== Series Details ==
Series: Enable ccs compressed framebuffers on Xe2
URL : https://patchwork.freedesktop.org/series/128947/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_128947v1
Summary
---
**FA
== Series Details ==
Series: drm/i915/gt: Reflect the true and current status of rc6_enable (rev2)
URL : https://patchwork.freedesktop.org/series/128839/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_128839v2
=
On Wed, Jan 17, 2024 at 12:58:15PM +, Andri Yngvason wrote:
> mið., 17. jan. 2024 kl. 09:21 skrifaði Pekka Paalanen :
> >
> > On Tue, 16 Jan 2024 14:11:43 +
> > Andri Yngvason wrote:
> >
> > > þri., 16. jan. 2024 kl. 13:29 skrifaði Sebastian Wick
> > > :
> > > >
> > > > On Tue, Jan 16, 202
== Series Details ==
Series: drm/i915: Try to preserve the current shared_dpll for fastset on type-c
ports
URL : https://patchwork.freedesktop.org/series/128943/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_128943v1
From: Ville Syrjälä
On HSW non-ULT (or at least on Dell Latitude E6540) external displays
start to flicker when we enable PSR on the eDP. We observe a much higher
SR and PC6 residency than should be possible with an external display,
and indeen much higher than what we observe with eDP disabled a
== Series Details ==
Series: Bigjoiner refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/128311/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_128311v3
Summary
---
**SUCCESS**
No
Hi,
Reviving this thread as now with xe driver merged we have 2 users for
a fixed-width BIT/GENMASK.
On Wed, Jun 21, 2023 at 07:20:59PM -0700, Yury Norov wrote:
Hi Lucas, all!
(Thanks, Andy, for pointing to this thread.)
On Mon, May 08, 2023 at 10:14:02PM -0700, Lucas De Marchi wrote:
Add GE
== Series Details ==
Series: Bigjoiner refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/128311/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warnin
== Series Details ==
Series: Bigjoiner refactoring (rev3)
URL : https://patchwork.freedesktop.org/series/128311/
State : warning
== Summary ==
Error: dim checkpatch failed
82e637e50454 drm/i915: Add bigjoiner force enable option to debugfs
-:70: CHECK:PARENTHESIS_ALIGNMENT: Alignment should ma
== Series Details ==
Series: QGV/SAGV related fixes (rev5)
URL : https://patchwork.freedesktop.org/series/126962/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14139 -> Patchwork_126962v5
Summary
---
**FAILURE**
S
== Series Details ==
Series: QGV/SAGV related fixes (rev5)
URL : https://patchwork.freedesktop.org/series/126962/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warni
== Series Details ==
Series: QGV/SAGV related fixes (rev5)
URL : https://patchwork.freedesktop.org/series/126962/
State : warning
== Summary ==
Error: dim checkpatch failed
2b101b19c57e drm/i915: Add meaningful traces for QGV point info error handling
642d40ddd8ca drm/i915: Extract code requir
On 1/18/24 15:24, Thomas Hellström wrote:
On Fri, 2024-01-12 at 13:51 +0100, Christian König wrote:
Previously we would never try to move a BO into the preferred
placements
when it ever landed in a busy placement since those were considered
compatible.
Rework the whole handling and finally un
On 1/17/24 13:27, Thomas Hellström wrote:
On 1/17/24 11:47, Thomas Hellström wrote:
Hi, Christian
Xe changes look good. Will send the series to xe ci to check for
regressions.
Hmm, there are some checkpatch warnings about author / SOB email
mismatch,
With those fixed, this patch is
Re
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c
b/drivers
Add BO bind time pat index member to xe_bo structure
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/xe/xe_bo_types.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 14ef13b7b421..1825bf013dd0 100644
--- a
With Xe2 always treat tile4 as if it was using flat ccs.
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_unive
Store pat index from xe_vma to xe_bo
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/xe/xe_pt.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index de1030a47588..4b76db698878 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/dr
This patch set touches Xe and i915 drivers. On i915 is checked if
running on Xe2 hardware and enable framebuffer ccs decompression
unconditionally for tile4 framebuffers. On Xe driver with Xe2
hardware check if ccs compression is in use and behave accordingly;
attempt to use ccs with linear and x-t
On Fri, 2024-01-12 at 13:51 +0100, Christian König wrote:
> Previously we would never try to move a BO into the preferred
> placements
> when it ever landed in a busy placement since those were considered
> compatible.
>
> Rework the whole handling and finally unify the idle and busy
> handling.
>
From: Ville Syrjälä
Currently icl_compute_tc_phy_dplls() assumes that the active
PLL will be the TC PLL (as opposed to the TBT PLL). The actual
PLL will be selected during the modeset enable sequence, but
we need to put *something* into the crtc_state->shared_dpll
already during compute_config().
Quoting Stanislav Lisovskiy (2024-01-17 12:57:16-03:00)
>For debug purposes we need those - error path won't flood the log,
>however there has been already numerous cases, when due to lack
>of debugs, we couldn't immediately tell what was the problem on
>customer machine, which slowed down the inve
On Thu, Jan 18, 2024 at 01:53:41PM +0200, Jani Nikula wrote:
> On Thu, 18 Jan 2024, Stanislav Lisovskiy
> wrote:
> > For validation purposes, it might be useful to be able to
> > force Bigjoiner mode, even if current dotclock/resolution
> > do not require that.
> > Lets add such to option to debu
On Thu, 18 Jan 2024, Stanislav Lisovskiy wrote:
> For validation purposes, it might be useful to be able to
> force Bigjoiner mode, even if current dotclock/resolution
> do not require that.
> Lets add such to option to debugfs.
>
> v2: - Apparently intel_dp_need_bigjoiner can't be used, when
>
For validation purposes, it might be useful to be able to
force Bigjoiner mode, even if current dotclock/resolution
do not require that.
Lets add such to option to debugfs.
v2: - Apparently intel_dp_need_bigjoiner can't be used, when
debugfs entry is created so lets just check manually
On Wed, 17 Jan 2024, Ville Syrjälä wrote:
> On Wed, Jan 17, 2024 at 02:25:46PM +0200, Jani Nikula wrote:
>> Not sure if lid_state has ever been used, but at least not for a long
>> time. Remove it.
>
> It was probably used when we had that disgusting lid notifier
> thing, but that got killed some
On Thu, Jan 18, 2024 at 11:07:23AM +0200, Ville Syrjälä wrote:
> On Thu, Jan 18, 2024 at 10:50:30AM +0200, Lisovskiy, Stanislav wrote:
> > On Thu, Jan 18, 2024 at 10:35:56AM +0200, Ville Syrjälä wrote:
> > > On Wed, Jan 17, 2024 at 05:57:18PM +0200, Stanislav Lisovskiy wrote:
> > > > Problem is tha
On Tue, 2024-01-16 at 22:49 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Our legacy cursor updates are actually mailbox updates.
> Ie. the hardware latches things once per frame on start of
> vblank, but we issue an number of updates per frame,
> withough any attempt to synchronize again
On Thu, Jan 18, 2024 at 10:50:30AM +0200, Lisovskiy, Stanislav wrote:
> On Thu, Jan 18, 2024 at 10:35:56AM +0200, Ville Syrjälä wrote:
> > On Wed, Jan 17, 2024 at 05:57:18PM +0200, Stanislav Lisovskiy wrote:
> > > Problem is that on some platforms, we do get QGV point mask in wrong
> > > state on b
On Thu, Jan 18, 2024 at 10:35:56AM +0200, Ville Syrjälä wrote:
> On Wed, Jan 17, 2024 at 05:57:18PM +0200, Stanislav Lisovskiy wrote:
> > Problem is that on some platforms, we do get QGV point mask in wrong
> > state on boot. However driver assumes it is set to 0
> > (i.e all points allowed), howev
From: Tvrtko Ursulin
Fix a bug where 1) the end vertical separator element would not be printed
if the progress bar portion was all filled by the progress bar characters
(no trailing spaces), and 2) the numerical overlay would be skipped to.
The bug would also shift the layout of following UI el
On Wed, Jan 17, 2024 at 05:57:18PM +0200, Stanislav Lisovskiy wrote:
> Problem is that on some platforms, we do get QGV point mask in wrong
> state on boot. However driver assumes it is set to 0
> (i.e all points allowed), however in reality we might get them all restricted,
> causing issues.
> Let
On Wed, Jan 17, 2024 at 05:57:17PM +0200, Stanislav Lisovskiy wrote:
> We need that in order to force disable SAGV in next patch.
> Also it is beneficial to separate that code, as in majority cases,
> when SAGV is enabled, we don't even need those calculations.
> Also we probably need to determine
Hi,
https://patchwork.freedesktop.org/series/127744/ - Re-reported.
Thanks,
Tejasree
-Original Message-
From: I915-ci-infra On Behalf Of
Saarinen, Jani
Sent: Monday, December 18, 2023 4:05 PM
To: intel-gfx@lists.freedesktop.org; Ville Syrjälä
; i915-ci-in...@lists.freedesktop.org
Subj
46 matches
Mail list logo
