On Wed, Nov 15, 2023 at 12:00:54PM +0530, Mitul Golani wrote:
> Compute Fixed Average Vtotal/CMRR with resepect to
> userspace VRR enablement. Also calculate required
> parameters in case of CMRR is enabled. During
> intel_vrr_compute_config, CMRR is getting enabled
> based on userspace has enable
Compute Fixed Average Vtotal/CMRR with resepect to
userspace VRR enablement. Also calculate required
parameters in case of CMRR is enabled. During
intel_vrr_compute_config, CMRR is getting enabled
based on userspace has enabled Adaptive Sync Vtotal
mode (Legacy VRR) or not.
Signed-off-by: Mitul G
Add CMRR/Fixed Average Vtotal mode enable and disable
functions based on change in VRR mode of operation.
When Adaptive Sync Vtotal is enabled, Fixed Average Vtotal
mode is disabled and vice versa. With this commit setting
the stage for subsequent CMRR enablement.
Signed-off-by: Mitul Golani
---
Add register definitions for Transcoder Fixed Average
Vtotal mode/CMRR function, with the necessary bitfields.
Compute these registers when CMRR is enabled, extending
Adaptive refresh rate capabilities.
Signed-off-by: Mitul Golani
---
drivers/gpu/drm/i915/display/intel_display.c | 23 ++
CMRR is a display feature that uses adaptive sync
framework to vary Vtotal slightly to match the
content rate exactly without frame drops. This
feature is a variation of VRR where it varies Vtotal
slightly (between additional 0 and 1 Vtotal scanlines)
to match content rate exactly without frame dro
Hello Krister,
> -Original Message-
> From: Krister Johansen
> Sent: Tuesday, November 14, 2023 11:11 PM
> To: Borah, Chaitanya Kumar
> Cc: Krister Johansen ; intel-
> g...@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani ;
> Miklos Szeredi
> Subject: Re: Regression on linu
== Series Details ==
Series: drm/i915/dsb: DSB code refactoring (rev7)
URL : https://patchwork.freedesktop.org/series/124141/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13876 -> Patchwork_124141v7
Summary
---
**FA
== Series Details ==
Series: drm/i915/dsb: DSB code refactoring (rev7)
URL : https://patchwork.freedesktop.org/series/124141/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:
== Series Details ==
Series: drm/i915/dsb: DSB code refactoring (rev7)
URL : https://patchwork.freedesktop.org/series/124141/
State : warning
== Summary ==
Error: dim checkpatch failed
73f25cc58b45 drm/i915/dsb: DSB code refactoring
Traceback (most recent call last):
File "scripts/spdxcheck.
On Sun, Nov 05, 2023 at 05:27:03PM +, Paz Zcharya wrote:
> Fix the value of variable `phys_base` to be the relative offset in
> stolen memory, and not the absolute offset of the GSM.
to me it looks like the other way around. phys_base is the physical
base address for the frame_buffer. Setting
== Series Details ==
Series: Selftest for FAST_REQUEST feature (rev3)
URL : https://patchwork.freedesktop.org/series/126044/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126044v3
Summary
---
**SUC
== Series Details ==
Series: Selftest for FAST_REQUEST feature (rev3)
URL : https://patchwork.freedesktop.org/series/126044/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: do not clean GT table on error path (rev2)
URL : https://patchwork.freedesktop.org/series/126385/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126385v2
Summary
== Series Details ==
Series: drm/i915: do not clean GT table on error path (rev2)
URL : https://patchwork.freedesktop.org/series/126385/
State : warning
== Summary ==
Error: dim checkpatch failed
0e75a4af93e7 drm/i915: do not clean GT table on error path
-:14: WARNING:COMMIT_LOG_LONG_LINE: Pre
== Series Details ==
Series: series starting with [v1,1/1] drm/i915/gt: Dont wait forever when
idling in suspend
URL : https://patchwork.freedesktop.org/series/126414/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126414v1
==
== Series Details ==
Series: series starting with [v1,1/1] drm/i915/gt: Dont wait forever when
idling in suspend
URL : https://patchwork.freedesktop.org/series/126414/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked se
== Series Details ==
Series: drm/i915/display: keep struct intel_display members sorted
URL : https://patchwork.freedesktop.org/series/126413/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126413v1
Summar
== Series Details ==
Series: drm/i915/display: keep struct intel_display members sorted
URL : https://patchwork.freedesktop.org/series/126413/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 2023-11-13 22:08, Stephen Rothwell wrote:
> Hi Luben,
>
> BTW, cherry picking commits does not avoid conflicts - in fact it can
> cause conflicts if there are further changes to the files affected by
> the cherry picked commit in either the tree/branch the commit was
> cheery picked from or the
== Series Details ==
Series: Resolve suspend-resume racing with GuC destroy-context-worker (rev6)
URL : https://patchwork.freedesktop.org/series/121916/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_121916v6
==
== Series Details ==
Series: Resolve suspend-resume racing with GuC destroy-context-worker (rev6)
URL : https://patchwork.freedesktop.org/series/121916/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/edid/firmware: drop drm_kms_helper.edid_firmware backward compat
(rev2)
URL : https://patchwork.freedesktop.org/series/124065/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_124065v2
==
== Series Details ==
Series: drm/edid/firmware: drop drm_kms_helper.edid_firmware backward compat
(rev2)
URL : https://patchwork.freedesktop.org/series/124065/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately
== Series Details ==
Series: drm/i915: Also check for VGA converter in eDP probe
URL : https://patchwork.freedesktop.org/series/126404/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126404v1
Summary
-
== Series Details ==
Series: drm/i915: Fix fractional bpp handling in intel_link_bw_reduce_bpp()
URL : https://patchwork.freedesktop.org/series/126403/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126403v1
===
== Series Details ==
Series: drm/i915/display: Remove dead code around
intel_atomic_helper->free_list (rev4)
URL : https://patchwork.freedesktop.org/series/126250/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126250v4
==
On 11/14/2023 9:20 AM, Tvrtko Ursulin wrote:
On 14/11/2023 17:03, Daniele Ceraolo Spurio wrote:
On 11/13/2023 8:46 AM, Tvrtko Ursulin wrote:
On 13/11/2023 15:51, Daniele Ceraolo Spurio wrote:
On 11/10/2023 4:00 AM, Tvrtko Ursulin wrote:
On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote:
On Tue, 2023-11-14 at 08:22 -0800, Teres Alexis, Alan Previn wrote:
> When suspending, add a timeout when calling
> intel_gt_pm_wait_for_idle else if we have a leaked
> wakeref (which would be indicative of a bug elsewhere
> in the driver), driver will at exit the suspend-resume
> cycle, after the
== Series Details ==
Series: drm/i915/display: Remove dead code around
intel_atomic_helper->free_list (rev4)
URL : https://patchwork.freedesktop.org/series/126250/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separa
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: move *_crtc_clock_get() to
intel_dpll.c
URL : https://patchwork.freedesktop.org/series/126388/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13875 -> Patchwork_126388v1
==
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: move *_crtc_clock_get() to
intel_dpll.c
URL : https://patchwork.freedesktop.org/series/126388/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separa
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: move *_crtc_clock_get() to
intel_dpll.c
URL : https://patchwork.freedesktop.org/series/126388/
State : warning
== Summary ==
Error: dim checkpatch failed
9458caf8991c drm/i915: move *_crtc_clock_get() to intel_dpll.c
-:346:
On Tue, 2023-11-14 at 17:52 +, Tvrtko Ursulin wrote:
> On 14/11/2023 17:37, Teres Alexis, Alan Previn wrote:
> > On Tue, 2023-11-14 at 17:27 +, Tvrtko Ursulin wrote:
> > > On 13/11/2023 17:57, Teres Alexis, Alan Previn wrote:
> > > > On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote:
On Tue, 2023-11-14 at 12:36 -0500, Vivi, Rodrigo wrote:
> On Tue, Nov 14, 2023 at 05:27:18PM +, Tvrtko Ursulin wrote:
> >
> > On 13/11/2023 17:57, Teres Alexis, Alan Previn wrote:
> > > On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote:
> > > > On 04/10/2023 18:59, Teres Alexis, Alan Pre
> -Original Message-
> From: Teres Alexis, Alan Previn
> Sent: Tuesday, November 14, 2023 5:32 PM
> To: ville.syrj...@linux.intel.com; Winkler, Tomas
> Cc: gre...@linuxfoundation.org; Usyskin, Alexander
> ; linux-ker...@vger.kernel.org; intel-
> g...@lists.freedesktop.org; Lubart, Vital
On 14.11.2023 17:30, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* drm/i915: do not clean GT table on error path
*URL:* https://patchwork.freedesktop.org/series/126385/
*State:*failure
*Details:*
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126385v1/i
On 14/11/2023 17:37, Teres Alexis, Alan Previn wrote:
On Tue, 2023-11-14 at 17:27 +, Tvrtko Ursulin wrote:
On 13/11/2023 17:57, Teres Alexis, Alan Previn wrote:
On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote:
On 04/10/2023 18:59, Teres Alexis, Alan Previn wrote:
On Thu, 2023-09
On Tue, 2023-11-14 at 17:27 +, Tvrtko Ursulin wrote:
> On 13/11/2023 17:57, Teres Alexis, Alan Previn wrote:
> > On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote:
> > > On 04/10/2023 18:59, Teres Alexis, Alan Previn wrote:
> > > > On Thu, 2023-09-28 at 13:46 +0100, Tvrtko Ursulin wrote:
On Tue, Nov 14, 2023 at 05:27:18PM +, Tvrtko Ursulin wrote:
>
> On 13/11/2023 17:57, Teres Alexis, Alan Previn wrote:
> > On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote:
> > > On 04/10/2023 18:59, Teres Alexis, Alan Previn wrote:
> > > > On Thu, 2023-09-28 at 13:46 +0100, Tvrtko Ursul
On 13/11/2023 17:57, Teres Alexis, Alan Previn wrote:
On Wed, 2023-10-25 at 13:58 +0100, Tvrtko Ursulin wrote:
On 04/10/2023 18:59, Teres Alexis, Alan Previn wrote:
On Thu, 2023-09-28 at 13:46 +0100, Tvrtko Ursulin wrote:
On 27/09/2023 17:36, Teres Alexis, Alan Previn wrote:
alan:snip
It i
On Tue, 14 Nov 2023, Takashi Iwai wrote:
> (Also thought that drm-tip or whatever tree also drags the recent
> changes from sound.git tree for relevant part.)
We've dropped the sound branches from drm-tip, mostly because they were
repeatedly rebased on Linus' master (as opposed to tags) during th
On 14/11/2023 17:03, Daniele Ceraolo Spurio wrote:
On 11/13/2023 8:46 AM, Tvrtko Ursulin wrote:
On 13/11/2023 15:51, Daniele Ceraolo Spurio wrote:
On 11/10/2023 4:00 AM, Tvrtko Ursulin wrote:
On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote:
The GSC CS is not exposed to the user, so we sk
On 11/13/2023 8:46 AM, Tvrtko Ursulin wrote:
On 13/11/2023 15:51, Daniele Ceraolo Spurio wrote:
On 11/10/2023 4:00 AM, Tvrtko Ursulin wrote:
On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote:
The GSC CS is not exposed to the user, so we skipped assigning a uabi
class number for it. Howeve
On Tue, 14 Nov 2023 14:31:25 +0100,
Saarinen, Jani wrote:
>
> Hi,
> > -Original Message-
> > From: Maarten Lankhorst
> > Sent: Tuesday, November 14, 2023 3:30 PM
> > To: Jani Nikula ; Ville Syrjälä
> >
> > Cc: Takashi Iwai ; intel-gfx@lists.freedesktop.org; intel-
> > x...@lists.freedes
On Tue, Nov 14, 2023 at 05:55:28PM +0200, Jani Nikula wrote:
> Like the comment says,
>
> /* Grouping using anonymous structs. Keep sorted. */
>
> Stick to it.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> .../gpu/drm/i915/display/intel_display_core.h | 18
== Series Details ==
Series: drm/i915: do not clean GT table on error path
URL : https://patchwork.freedesktop.org/series/126385/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13873 -> Patchwork_126385v1
Summary
---
When suspending, add a timeout when calling
intel_gt_pm_wait_for_idle else if we have a leaked
wakeref (which would be indicative of a bug elsewhere
in the driver), driver will at exit the suspend-resume
cycle, after the kernel detects the held reference and
prints a message to abort suspending ins
== Series Details ==
Series: drm/i915: do not clean GT table on error path
URL : https://patchwork.freedesktop.org/series/126385/
State : warning
== Summary ==
Error: dim checkpatch failed
272a68a547e9 drm/i915: do not clean GT table on error path
-:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a m
On Tue, Nov 14, 2023 at 04:56:35AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Tune down FEC detection timeout error message
> URL : https://patchwork.freedesktop.org/series/126340/
> State : success
Patch is pushed to -din, thanks for the review.
>
> == Summary ==
Like the comment says,
/* Grouping using anonymous structs. Keep sorted. */
Stick to it.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_display_core.h | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/int
== Series Details ==
Series: series starting with [1/4] drm/i915: move *_crtc_clock_get() to
intel_dpll.c (rev2)
URL : https://patchwork.freedesktop.org/series/126345/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13873 -> Patchwork_126345v2
==
Hey,
Den 2023-11-14 kl. 16:50, skrev Takashi Iwai:
On Tue, 14 Nov 2023 15:39:16 +0100,
Maarten Lankhorst wrote:
Hey,
Den 2023-11-14 kl. 14:39, skrev Ville Syrjälä:
On Tue, Nov 14, 2023 at 02:35:10PM +0200, Jani Nikula wrote:
On Tue, 14 Nov 2023, Ville Syrjälä wrote:
When suspending, flush the context-guc-id
deregistration worker at the final stages of
intel_gt_suspend_late when we finally call gt_sanitize
that eventually leads down to __uc_sanitize so that
the deregistration worker doesn't fire off later as
we reset the GuC microcontroller.
Signed-off-by: Ala
If we are at the end of suspend or very early in resume
its possible an async fence signal (via rcu_call) is triggered
to free_engines which could lead us to the execution of
the context destruction worker (after a prior worker flush).
Thus, when suspending, insert rcu_barriers at the start
of i91
This series is the result of debugging issues root caused to
races between the GuC's destroyed_worker_func being triggered
vs repeating suspend-resume cycles with concurrent delayed
fence signals for engine-freeing.
The reproduction steps require that an app is launched right
before the start of t
On Tue, 14 Nov 2023 15:39:16 +0100,
Maarten Lankhorst wrote:
>
>
> Hey,
>
> Den 2023-11-14 kl. 14:39, skrev Ville Syrjälä:
>
> On Tue, Nov 14, 2023 at 02:35:10PM +0200, Jani Nikula wrote:
>
> On Tue, 14 Nov 2023, Ville Syrjälä
> wrote:
>
> On Mon, Oct 02,
> -Original Message-
> From: Intel-gfx On Behalf Of Juha-
> Pekka Heikkila
> Sent: Tuesday, November 14, 2023 2:03 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 3/3] drm/i915/display: In intel_framebuffer_init
> switch to use intel_bo_to_drm_bo
>
> Use intel_bo
== Series Details ==
Series: series starting with [1/4] drm/i915: move *_crtc_clock_get() to
intel_dpll.c (rev2)
URL : https://patchwork.freedesktop.org/series/126345/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked se
== Series Details ==
Series: series starting with [1/4] drm/i915: move *_crtc_clock_get() to
intel_dpll.c (rev2)
URL : https://patchwork.freedesktop.org/series/126345/
State : warning
== Summary ==
Error: dim checkpatch failed
745a45011899 drm/i915: move *_crtc_clock_get() to intel_dpll.c
-:3
On 11/14/2023 7:40 PM, Imre Deak wrote:
Convert crtc_state->pipe_bpp to U6.4 format as expected by the rest of
the function.
Fixes: 59a266f068b4 ("drm/i915/display: Store compressed bpp in U6.4 format")
Cc: Ankit Nautiyal
Cc: Suraj Kandpal
Cc: Sui Jingfeng
Signed-off-by: Imre Deak
---
driv
On Tue, 2023-11-14 at 16:00 +0200, Ville Syrjälä wrote:
> On Wed, Oct 11, 2023 at 02:01:56PM +0300, Tomas Winkler wrote:
> > From: Alexander Usyskin
> >
> > Disable and enable mei-pxp client on errors to clean the internal state.
>
> This broke i915 on my Alderlake-P laptop.
>
Hi Alex, i just
Since the edid_firmware module parameter was moved from
drm_kms_helper.ko to drm.ko in v4.15, we've had a backwards
compatibility helper in place, with a DRM_NOTE() suggesting to migrate
to drm.edid_firmware. This was added in commit ac6c35a4d8c7 ("drm: add
backwards compatibility support for drm_k
On Tue, 14 Nov 2023 12:06:45 +0100,
Ville Syrjälä wrote:
>
> On Mon, Oct 02, 2023 at 09:38:44PM +0200, maarten.lankho...@linux.intel.com
> wrote:
> > From: Maarten Lankhorst
> >
> > Now that we can use -EPROBE_DEFER, it's no longer required to spin off
> > the snd_hdac_i915_init into a workqueu
Hey,
Den 2023-11-14 kl. 14:39, skrev Ville Syrjälä:
On Tue, Nov 14, 2023 at 02:35:10PM +0200, Jani Nikula wrote:
On Tue, 14 Nov 2023, Ville Syrjälä wrote:
On Mon, Oct 02, 2023 at 09:38:44PM +0200,maarten.lankho...@linux.intel.com
wrote:
From: Maarten Lankhorst
Now that we can use -EPROBE_
From: Ville Syrjälä
Unfortunately even the HPD based detection added in
commit cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe")
fails to detect that the VBT's eDP/DDI-A is a ghost on
Asus B360M-A (CFL+CNP). On that board eDP/DDI-A has its HPD
asserted despite nothing being actuall
Convert crtc_state->pipe_bpp to U6.4 format as expected by the rest of
the function.
Fixes: 59a266f068b4 ("drm/i915/display: Store compressed bpp in U6.4 format")
Cc: Ankit Nautiyal
Cc: Suraj Kandpal
Cc: Sui Jingfeng
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_link_bw.c |
On Wed, Oct 11, 2023 at 02:01:56PM +0300, Tomas Winkler wrote:
> From: Alexander Usyskin
>
> Disable and enable mei-pxp client on errors to clean the internal state.
This broke i915 on my Alderlake-P laptop.
Trying to start Xorg just hangs and I eventually have to power off the
laptop to get th
On Tue, 2023-11-14 at 10:48 +0200, Ville Syrjälä wrote:
> On Fri, Nov 10, 2023 at 10:24:55AM +0200, Jouni Högander wrote:
> > After switching to directly using dma_fence instead of
> > i915_sw_fence we
> > have left some dead code around intel_atomic_helper->free_list.
> > Remove that
> > dead code
After switching to directly using dma_fence instead of i915_sw_fence we
have left some dead code around intel_atomic_helper->free_list. Remove that
dead code.
v2: Remove intel_atomic_state->freed as well
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.c | 20 --
On Tue, Nov 14, 2023 at 02:35:10PM +0200, Jani Nikula wrote:
> On Tue, 14 Nov 2023, Ville Syrjälä wrote:
> > On Mon, Oct 02, 2023 at 09:38:44PM +0200, maarten.lankho...@linux.intel.com
> > wrote:
> >> From: Maarten Lankhorst
> >>
> >> Now that we can use -EPROBE_DEFER, it's no longer required t
Hi,
> -Original Message-
> From: Maarten Lankhorst
> Sent: Tuesday, November 14, 2023 3:30 PM
> To: Jani Nikula ; Ville Syrjälä
>
> Cc: Takashi Iwai ; intel-gfx@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org; alsa-de...@alsa-project.org; Saarinen, Jani
> ; Kurmi, Suresh Kumar
Hey,
Den 2023-11-14 kl. 13:35, skrev Jani Nikula:
On Tue, 14 Nov 2023, Ville Syrjälä wrote:
On Mon, Oct 02, 2023 at 09:38:44PM +0200, maarten.lankho...@linux.intel.com
wrote:
From: Maarten Lankhorst
Now that we can use -EPROBE_DEFER, it's no longer required to spin off
the snd_hdac_i915_in
On Tue, Nov 14, 2023 at 11:00:49AM +0200, Jani Nikula wrote:
> On Mon, 13 Nov 2023, Imre Deak wrote:
> > Apply the correct BW allocation overhead and channel coding efficiency
> > on UHBR link rates, similarly to DP1.4 link rates.
> >
> > Signed-off-by: Imre Deak
> > ---
> > drivers/gpu/drm/i915
On Tue, 14 Nov 2023, Ville Syrjälä wrote:
> On Mon, Oct 02, 2023 at 09:38:44PM +0200, maarten.lankho...@linux.intel.com
> wrote:
>> From: Maarten Lankhorst
>>
>> Now that we can use -EPROBE_DEFER, it's no longer required to spin off
>> the snd_hdac_i915_init into a workqueue.
>>
>> Use the -EP
On Tue, 2023-11-14 at 11:35 +, Manna, Animesh wrote:
>
> > -Original Message-
> > From: Coelho, Luciano
> > Sent: Tuesday, November 14, 2023 4:47 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: Nikula, Jani
> > Subject: Re: [Intel-gfx] [PATCH v6] drm/i915/ds
> -Original Message-
> From: Coelho, Luciano
> Sent: Tuesday, November 14, 2023 4:47 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: Re: [Intel-gfx] [PATCH v6] drm/i915/dsb: DSB code refactoring
>
> On Fri, 2023-11-10 at 08:55 +0530, Animesh
On Fri, 2023-11-10 at 08:55 +0530, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
>
> v1: RFC version.
> v2: Make intel_dsb structure opaque from external usage. [Jani]
> v3: Rebased on latest.
> v4:
> - Add boundary check in dsb_buffer_memset(). [Luca]
> - Use
== Series Details ==
Series: drm/i915/dsb: DSB code refactoring (rev6)
URL : https://patchwork.freedesktop.org/series/124141/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13859 -> Patchwork_124141v6
Summary
---
**SU
On Mon, Oct 02, 2023 at 09:38:44PM +0200, maarten.lankho...@linux.intel.com
wrote:
> From: Maarten Lankhorst
>
> Now that we can use -EPROBE_DEFER, it's no longer required to spin off
> the snd_hdac_i915_init into a workqueue.
>
> Use the -EPROBE_DEFER mechanism instead, which must be returned
vlv_dpio_read() and vlv_dpio_write() really operate on the phy, not
pipe. Passing the pipe instead of the phy as parameter is supposed to be
a convenience, but when the caller has the phy, it becomes an
inconvenience. See e.g. chv_dpio_cmn_power_well_enable() and
assert_chv_phy_powergate().
Figure
Considering what the functions do, intel_dpll.c is a more suitable
location, and lets us make some functions static while at it.
This also means intel_display.c no longer does any DPIO access.
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.
Add a helper with better typing and handing for bogus input, and better
in line with vlv_dig_port_to_channel(), vlv_dig_port_to_phy(), and
vlv_pipe_to_channel().
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 14 ++
drivers/
On Tue, 14 Nov 2023, Ville Syrjälä wrote:
> On Mon, Nov 13, 2023 at 06:47:11PM +0200, Jani Nikula wrote:
>> Move the VLV/CHV sideband doorbell and data/addr MMIO registers as well
>> as the DPIO register definitions to vlv_sideband_reg.h.
>
> I have patches sitting in a branch to extract {vlv,bxt}
On Tue, 14 Nov 2023, Ville Syrjälä wrote:
> On Mon, Nov 13, 2023 at 06:47:10PM +0200, Jani Nikula wrote:
>> vlv_dpio_read() and vlv_dpio_write() really operate on the phy, not
>> pipe. Passing the pipe instead of the phy as parameter is supposed to be
>> a convenience, but when the caller has the
On 11/10/2023 3:40 PM, Ankit Nautiyal wrote:
This patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some fixes, followed by patches that
lay groundwork to iterate over valid compressed bpps to select the
'best' compressed bpp with optimal link configur
> -Original Message-
> From: Hajda, Andrzej
> Sent: Tuesday, November 14, 2023 12:22 PM
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Use int for entry setup frames
>
> On 13.11.2023 10:37, Mika Kahola wrote:
> > At least one TGL had
On 13.11.2023 10:37, Mika Kahola wrote:
At least one TGL had regression when using u8 types
for entry setup frames calculation. So, let's switch
to use ints instead.
This explanation is missing the most important part - why int?
I guess it is because intel_psr_entry_setup_frames can return -ET
== Series Details ==
Series: drm/i915/xe2lpd: WA for underruns during FBC enable (rev3)
URL : https://patchwork.freedesktop.org/series/126143/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13865 -> Patchwork_126143v3
Summar
On Mon, 2023-11-13 at 22:32 +0200, Juha-Pekka Heikkila wrote:
> Here created intel_dpt_common.c to hold intel_dpt_configure which is
> needed for both xe and i915.
For the whole series:
Reviewed-by: Jouni Högander
BR,
Jouni Högander
> Signed-off-by: Juha-Pekka Heikkila
> ---
> drivers/gpu/
On Mon, 2023-11-13 at 11:37 +0200, Mika Kahola wrote:
> At least one TGL had regression when using u8 types
> for entry setup frames calculation. So, let's switch
> to use ints instead.
I think you need to add Fixes tag here? With this change:
Reviewed-by: Jouni Högander
>
> Signed-off-by: Mik
ut_tiles_cleanup:
- intel_gt_release_all(i915);
out_runtime_pm_put:
enable_rpm_wakeref_asserts(&i915->runtime_pm);
i915_driver_late_release(i915);
---
base-commit: c6f47b4817ee55a02359c3347a298876cfa93b0e
change-id: 20231114-dont_clean_gt_on_error_path-91cd9c3caa0a
Best regards,
--
Andrzej Hajda
> MTL+ supports fractional compressed bits_per_pixel, with precision of
> 1/16. This compressed bpp is stored in U6.4 format.
> Accommodate the precision during calculation of transfer unit data for
> hblank_early calculation.
>
> v2:
> -Fix tu_data calculation while dealing with U6.4 format. (Sta
On Mon, Nov 13, 2023 at 06:47:11PM +0200, Jani Nikula wrote:
> Move the VLV/CHV sideband doorbell and data/addr MMIO registers as well
> as the DPIO register definitions to vlv_sideband_reg.h.
I have patches sitting in a branch to extract {vlv,bxt}_dpio_phy_regs.h
instead. I think that split makes
> MTL+ supports fractional compressed bits_per_pixel, with precision of
> 1/16. This compressed bpp is stored in U6.4 format.
> Accommodate this precision while computing m_n values.
>
> v1:
> Replace the computation of 'data_clock' with 'data_clock =
> DIV_ROUND_UP(data_clock, 16).' (Sui Jingfe
On Mon, Nov 13, 2023 at 06:47:10PM +0200, Jani Nikula wrote:
> vlv_dpio_read() and vlv_dpio_write() really operate on the phy, not
> pipe. Passing the pipe instead of the phy as parameter is supposed to be
> a convenience, but when the caller has the phy, it becomes an
> inconvenience. See e.g. chv
Hi Alexander,
+ Michael and Tudor
Folks, any interesting thought about the below discussion?
alexander.usys...@intel.com wrote on Tue, 14 Nov 2023 08:47:34 +:
> >
> > > > > > > + spi->mtd.writesize = SZ_1; /* 1 byte granularity */
> > > > > >
> > > > > > You say writesize should be ali
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: Friday, November 10, 2023 3:40 PM
> To: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Sharma, Swati2 ; Kulkarni, Vandita
> ; Kandpal, Suraj ;
> suijingf...@loongson.cn
> Subject: [PATCH 02/11] drm/i915/displ
On Mon, Nov 13, 2023 at 06:47:09PM +0200, Jani Nikula wrote:
> Add a helper with better typing and handing for bogus input, and better
> in line with vlv_dig_port_to_channel(), vlv_dig_port_to_phy(), and
> vlv_pipe_to_channel().
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
>
On Mon, Nov 13, 2023 at 06:47:08PM +0200, Jani Nikula wrote:
> Considering what the functions do, intel_dpll.c is a more suitable
> location, and lets us make some functions static while at it.
>
> This also means intel_display.c no longer does any DPIO access.
>
> Signed-off-by: Jani Nikula
Re
On Mon, 13 Nov 2023, Imre Deak wrote:
> Apply the correct BW allocation overhead and channel coding efficiency
> on UHBR link rates, similarly to DP1.4 link rates.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10 --
> 1 file changed, 10 deletions(-)
1 - 100 of 108 matches
Mail list logo
