Re: [Intel-gfx] [PATCH v3 0/7] Fix ctx workarounds for non-masked regs

2023-07-03 Thread Lucas De Marchi
On Fri, Jun 30, 2023 at 05:41:21PM -0700, Kenneth Graunke wrote: On Friday, June 30, 2023 1:35:02 PM PDT Lucas De Marchi wrote: v3 of https://patchwork.freedesktop.org/series/119766/ Changes from v2: - Do not rmw if (clr | set) covers all bits - Add patch to make sure the set b

Re: [Intel-gfx] [PATCH v7 2/8] PCI/VGA: Deal only with VGA class devices

2023-07-03 Thread Sui Jingfeng
Hi, On 2023/6/16 22:34, Alex Deucher wrote: On Fri, Jun 16, 2023 at 10:22 AM Sui Jingfeng wrote: On 2023/6/16 21:41, Alex Deucher wrote: On Fri, Jun 16, 2023 at 3:11 AM Sui Jingfeng wrote: Hi, On 2023/6/16 05:11, Alex Deucher wrote: On Wed, Jun 14, 2023 at 6:50 AM Sui Jingfeng wrote: H

Re: [Intel-gfx] [RFC] tentative fix for drm/i915/gt regression on preempt-rt

2023-07-03 Thread Sebastian Andrzej Siewior
On 2023-07-03 16:30:01 [+0100], Tvrtko Ursulin wrote: > Hi, Hi, > > Atomic requirement from that commit text is likely referring to removing the > old big sleeping mutex we had in the reset path. So it looks plausible that > preempt_disable() section is not strictly needed and perhaps motivation

Re: [Intel-gfx] [RFC] tentative fix for drm/i915/gt regression on preempt-rt

2023-07-03 Thread Tvrtko Ursulin
Hi, On 30/06/2023 14:09, Sebastian Andrzej Siewior wrote: On 2023-06-22 20:57:50 [-0400], Paul Gortmaker wrote: [ longer report about what is broken.] Commit ade8a0f598443 ("drm/i915: Make all GPU resets atomic") introduces a preempt_disable() section around the invocation of the reset callba

[Intel-gfx] ✓ Fi.CI.IGT: success for Add rc_range_params for YUV420

2023-07-03 Thread Patchwork
== Series Details == Series: Add rc_range_params for YUV420 URL : https://patchwork.freedesktop.org/series/120134/ State : success == Summary == CI Bug Log - changes from CI_DRM_13341_full -> Patchwork_120134v1_full Summary --- **WAR

Re: [Intel-gfx] [PATCH v2] drm/i915: Refactor PAT/cache handling

2023-07-03 Thread Tvrtko Ursulin
On 30/06/2023 07:55, Yang, Fei wrote: > From: Tvrtko Ursulin > > Informal commit message for now. > > I got a bit impatient and curious to see if the idea we discussed would > work so sketched something out. I think it is what I was describing back > then.. > > So high level idea is t

[Intel-gfx] ✓ Fi.CI.BAT: success for Add rc_range_params for YUV420

2023-07-03 Thread Patchwork
== Series Details == Series: Add rc_range_params for YUV420 URL : https://patchwork.freedesktop.org/series/120134/ State : success == Summary == CI Bug Log - changes from CI_DRM_13341 -> Patchwork_120134v1 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add rc_range_params for YUV420

2023-07-03 Thread Patchwork
== Series Details == Series: Add rc_range_params for YUV420 URL : https://patchwork.freedesktop.org/series/120134/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warn

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/i915_pm_rps: Exercise sysfs thresholds

2023-07-03 Thread Tvrtko Ursulin
On 30/06/2023 20:16, Belgaumkar, Vinay wrote: On 5/23/2023 3:51 AM, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Exercise a bunch of up and down rps thresholds to verify hardware is happy with them all. To limit the overall runtime relies on probability and number of runs to approach complet

[Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420

2023-07-03 Thread Suraj Kandpal
Some rc_range_parameter calculations were missed for YCBCR420, add them to calculate_rc_param() --v2 -take into account the new formula to get bpp_i Cc: Vandita Kulkarni Cc: Ankit Nautiyal Cc: Uma Shankar Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_vdsc.c | 142 ++

[Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration

2023-07-03 Thread Suraj Kandpal
Fix comment for YUV420 qp table declaration of max value where the min value is 4 and the max value is 12/15/18 depending on bpc. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_qp_tables.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers

[Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420

2023-07-03 Thread Suraj Kandpal
Move rc_param calculation for native_420 into calculate_rc_parameter. second_line_bpg_offset and second_line_offset_adj are both rc params and it would be better to have these calculated where all the other rc parameters are calculated. --v2 -Add the reason for commit in commit message [Jani] --v

[Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420

2023-07-03 Thread Suraj Kandpal
Calculations for YUV420 were missing from calculate_rc_param, add them be in line with DSC 1.2a specs. Signed-off-by: Suraj Kandpal Suraj Kandpal (3): drm/i915/dsc: Move rc param calculation for native_420 drm/i915/drm: Fix comment for YUV420 qp table declaration drm/i915/dsc: Add rc_range

Re: [Intel-gfx] [PATCH] drm/i915: Don't rely that 2 VDSC engines are always enough for pixel rate

2023-07-03 Thread Nautiyal, Ankit K
On 7/3/2023 2:20 PM, Lisovskiy, Stanislav wrote: On Mon, Jul 03, 2023 at 10:23:00AM +0530, Nautiyal, Ankit K wrote: On 6/28/2023 3:38 PM, Stanislav Lisovskiy wrote: We are currently having FIFO underruns happening for kms_dsc test case, problem is that, we check if curreny cdclk is >= pixel r

Re: [Intel-gfx] [PATCH] drm/i915: Don't rely that 2 VDSC engines are always enough for pixel rate

2023-07-03 Thread Lisovskiy, Stanislav
On Mon, Jul 03, 2023 at 10:23:00AM +0530, Nautiyal, Ankit K wrote: > > On 6/28/2023 3:38 PM, Stanislav Lisovskiy wrote: > > We are currently having FIFO underruns happening for kms_dsc test case, > > problem is that, we check if curreny cdclk is >= pixel rate only if > > there is a single VDSC eng